18 #ifndef __LPC_ERROR_H__ 19 #define __LPC_ERROR_H__ 45 ERR_ISP_BASE = 0x00000000,
46 ERR_ISP_INVALID_COMMAND = ERR_ISP_BASE + 1,
47 ERR_ISP_SRC_ADDR_ERROR,
48 ERR_ISP_DST_ADDR_ERROR,
49 ERR_ISP_SRC_ADDR_NOT_MAPPED,
50 ERR_ISP_DST_ADDR_NOT_MAPPED,
52 ERR_ISP_INVALID_SECTOR,
53 ERR_ISP_SECTOR_NOT_BLANK,
54 ERR_ISP_SECTOR_NOT_PREPARED_FOR_WRITE_OPERATION,
55 ERR_ISP_COMPARE_ERROR,
59 ERR_ISP_ADDR_NOT_MAPPED,
62 ERR_ISP_INVALID_BAUD_RATE,
63 ERR_ISP_INVALID_STOP_BIT,
64 ERR_ISP_CODE_READ_PROTECTION_ENABLED,
65 ERR_ISP_INVALID_FLASH_UNIT,
66 ERR_ISP_USER_CODE_CHECKSUM,
67 ERR_ISP_SETTING_ACTIVE_PARTITION,
69 ERR_ISP_FLASH_NO_POWER,
70 ERR_ISP_EEPROM_NO_POWER,
71 ERR_ISP_EEPROM_NO_CLOCK,
72 ERR_ISP_FLASH_NO_CLOCK,
73 ERR_ISP_REINVOKE_ISP_CONFIG,
74 ERR_ISP_NO_VALID_IMAGE,
75 ERR_ISP_ADDR_NOT_SEQUENTIAL,
86 ERR_SPIFI_BASE = 0x00020000,
87 ERR_SPIFI_DEVICE_ERROR = ERR_SPIFI_BASE + 1,
88 ERR_SPIFI_INTERNAL_ERROR,
90 ERR_SPIFI_OPERAND_ERROR,
91 ERR_SPIFI_STATUS_PROBLEM,
92 ERR_SPIFI_UNKNOWN_EXT,
94 ERR_SPIFI_UNKNOWN_TYPE,
95 ERR_SPIFI_UNKNOWN_MFG,
97 ERR_SPIFI_ERASE_NEEDED,
101 ERR_SEC_AES_BASE = 0x00030000,
102 ERR_SEC_AES_WRONG_CMD = ERR_SEC_AES_BASE + 1,
103 ERR_SEC_AES_NOT_SUPPORTED,
104 ERR_SEC_AES_KEY_ALREADY_PROGRAMMED,
105 ERR_SEC_AES_DMA_CHANNEL_CFG,
106 ERR_SEC_AES_DMA_MUX_CFG,
109 SEC_AES_KEY_NOTVALID,
112 ERR_USBD_BASE = 0x00040000,
ERR_USBD_INVALID_REQ = ERR_USBD_BASE + 1,
ERR_USBD_UNHANDLED,
ERR_USBD_STALL,
ERR_USBD_SEND_ZLP,
ERR_USBD_SEND_DATA,
ERR_USBD_BAD_DESC,
ERR_USBD_BAD_CFG_DESC,
ERR_USBD_BAD_INTF_DESC,
ERR_USBD_BAD_EP_DESC,
ERR_USBD_BAD_MEM_BUF,
ERR_USBD_TOO_MANY_CLASS_HDLR,
126 ERR_CGU_BASE = 0x00050000,
127 ERR_CGU_NOT_IMPL = ERR_CGU_BASE + 1,
128 ERR_CGU_INVALID_PARAM,
129 ERR_CGU_INVALID_SLICE,
136 ERR_I2C_BASE = 0x00060000,
137 ERR_I2C_BUSY = ERR_I2C_BASE,
139 ERR_I2C_BUFFER_OVERFLOW,
140 ERR_I2C_BYTE_COUNT_ERR,
141 ERR_I2C_LOSS_OF_ARBRITRATION,
142 ERR_I2C_SLAVE_NOT_ADDRESSED,
143 ERR_I2C_LOSS_OF_ARBRITRATION_NAK_BIT,
144 ERR_I2C_GENERAL_FAILURE,
145 ERR_I2C_REGS_SET_TO_DEFAULT,
147 ERR_I2C_BUFFER_UNDERFLOW,
151 ERR_OTP_BASE = 0x00070000,
152 ERR_OTP_WR_ENABLE_INVALID = ERR_OTP_BASE + 1,
153 ERR_OTP_SOME_BITS_ALREADY_PROGRAMMED,
154 ERR_OTP_ALL_DATA_OR_MASK_ZERO,
155 ERR_OTP_WRITE_ACCESS_LOCKED,
156 ERR_OTP_READ_DATA_MISMATCH,
157 ERR_OTP_USB_ID_ENABLED,
158 ERR_OTP_ETH_MAC_ENABLED,
159 ERR_OTP_AES_KEYS_ENABLED,
160 ERR_OTP_ILLEGAL_BANK,
161 ERR_OTP_SHUFFLER_CONFIG_NOT_VALID,
162 ERR_OTP_SHUFFLER_NOT_ENABLED,
163 ERR_OTP_SHUFFLER_CAN_ONLY_PROG_SINGLE_KEY,
164 ERR_OTP_ILLEGAL_PROGRAM_DATA,
165 ERR_OTP_READ_ACCESS_LOCKED,
168 ERR_UART_BASE = 0x00080000,
169 ERR_UART_RXD_BUSY = ERR_UART_BASE + 1,
171 ERR_UART_OVERRUN_FRAME_PARITY_NOISE,
177 ERR_CAN_BASE = 0x00090000,
178 ERR_CAN_BAD_MEM_BUF = ERR_CAN_BASE + 1,
180 ERR_CANOPEN_INIT_FAIL,
183 ERR_SPIFI_LITE_BASE = 0x000A0000,
184 ERR_SPIFI_LITE_INVALID_ARGUMENTS = ERR_SPIFI_LITE_BASE + 1,
186 ERR_SPIFI_LITE_MEMORY_MODE_ON,
187 ERR_SPIFI_LITE_MEMORY_MODE_OFF,
188 ERR_SPIFI_LITE_IN_DMA,
189 ERR_SPIFI_LITE_NOT_IN_DMA,
193 ERR_CLK_BASE = 0x000B0000,
194 ERR_CLK_NOT_IMPL = ERR_CLK_BASE + 1,
195 ERR_CLK_INVALID_PARAM,
196 ERR_CLK_INVALID_SLICE,
201 ERR_CLK_PLL_FIN_TOO_SMALL,
202 ERR_CLK_PLL_FIN_TOO_LARGE,
203 ERR_CLK_PLL_FOUT_TOO_SMALL,
204 ERR_CLK_PLL_FOUT_TOO_LARGE,
205 ERR_CLK_PLL_NO_SOLUTION,
212 ERR_CLK_OFF_DEADLOCK,
213 ERR_CLK_M_OUT_OF_RANGE,
214 ERR_CLK_N_OUT_OF_RANGE,
215 ERR_CLK_P_OUT_OF_RANGE,
218 ERR_PWR_BASE = 0x000C0000,
219 PWR_ERROR_ILLEGAL_MODE = ERR_PWR_BASE + 1,
220 PWR_ERROR_CLOCK_FREQ_TOO_HIGH,
221 PWR_ERROR_INVALID_STATE,
222 PWR_ERROR_INVALID_CFG,
223 PWR_ERROR_PVT_OFF_MAX_VOLTAGE,
226 ERR_DMA_BASE = 0x000D0000,
227 ERR_DMA_ERROR_INT = ERR_DMA_BASE + 1,
228 ERR_DMA_CHANNEL_NUMBER,
229 ERR_DMA_CHANNEL_DISABLED,
231 ERR_DMA_NOT_ALIGNMENT,
232 ERR_DMA_PING_PONG_EN,
233 ERR_DMA_CHANNEL_VALID_PENDING,
239 ERR_SPI_BASE = 0x000E0000,
240 ERR_SPI_BUSY = ERR_SPI_BASE,
244 ERR_SPI_SELNDEASSERT,
247 ERR_SPI_INVALID_LENGTH,
250 ERR_ADC_BASE = 0x000F0000,
251 ERR_ADC_OVERRUN = ERR_ADC_BASE + 1,
252 ERR_ADC_INVALID_CHANNEL,
253 ERR_ADC_INVALID_SEQUENCE,
254 ERR_ADC_INVALID_SETUP,
256 ERR_ADC_INVALID_LENGTH,
260 ERR_DM_BASE = 0x00100000,
261 ERR_DM_NOT_ENTERED = ERR_DM_BASE + 1,
267 #define offsetof(s, m) (int) &(((s *) 0)->m) 268 #define COMPILE_TIME_ASSERT(pred) switch (0) { \ 273 typedef void (*CALLBK_T)(
unsigned int res0,
unsigned int res1);
ErrorCode_t
Definition: error.h:38