USBD ROM Stack  2.0
ROM based USB device stack
hw_usbd_ip9028.h
1 /***********************************************************************
2 * $Id:: hw_usbd_ip9028.h 1228 2013-11-15 01:25:47Z usb10131 $
3 *
4 * Project: IP9208 USB-OTG device controller definitions
5 *
6 * Description:
7 * This file contains the structure definitions and manifest
8 * constants for the IP9208 component:
9 * Universal Serial Bus - On The Go (USB-OTG)
10 *
11 ***********************************************************************
12 * Copyright(C) 2011, NXP Semiconductor
13 * All rights reserved.
14 *
15 * Software that is described herein is for illustrative purposes only
16 * which provides customers with programming information regarding the
17 * products. This software is supplied "AS IS" without any warranties.
18 * NXP Semiconductors assumes no responsibility or liability for the
19 * use of the software, conveys no license or title under any patent,
20 * copyright, or mask work right to the product. NXP Semiconductors
21 * reserves the right to make changes in the software without
22 * notification. NXP Semiconductors also make no representation or
23 * warranty that such application will be suitable for the specified
24 * use without further testing or modification.
25 **********************************************************************/
26 
27 #ifndef HW_USBD_IP9208_H
28 #define HW_USBD_IP9208_H
29 
30 #include <stdint.h>
31 
32 #ifdef __cplusplus
33 extern "C"
34 {
35 #endif
36 
37 #ifndef _BIT
38 /* _BIT(n) sets the bit at position "n"
39  * _BIT(n) is intended to be used in "OR" and "AND" expressions:
40  * e.g., "(_BIT(3) | _BIT(7))".
41  */
42 /* Set bit macro */
43 #define _BIT(n) (((uint32_t)(1ul)) << (n))
44 
45 /* _SBF(f,v) sets the bit field starting at position "f" to value "v".
46  * _SBF(f,v) is intended to be used in "OR" and "AND" expressions:
47  * e.g., "((_SBF(5,7) | _SBF(12,0xF)) & 0xFFFF)"
48  */
49 /* Set bit field macro */
50 #define _SBF(f,v) (((uint32_t)(v)) << (f))
51 #endif /*_BIT*/
52 
53 /***********************************************************************
54 * USB Register Structures
55 **********************************************************************/
56 
57 /* USB Module Register Structure */
58 typedef volatile struct
59 {
60  volatile uint8_t RESERVED0[0x100];
61  /*Capability registers*/
62  volatile uint8_t caplength; /*Capability register length*/
63  volatile uint8_t _otg1[1];
64  volatile uint16_t hciversion; /*Host interface version number*/
65  volatile uint32_t hcsparams; /*Host controller structural parameters*/
66  volatile uint32_t hccparams; /*Host controller capability parameters*/
67  volatile uint32_t _otg2[5]; /*10Ch-11Fh 20 Reserved */
68  volatile uint16_t dciversion; /*Device interface version number*/
69  volatile uint16_t _otg3[1];
70  volatile uint32_t dccparams; /*Device controller capability parameters*/
71  volatile uint32_t _otg4a[4]; /*128h-134h 16 Reserved */
72  volatile uint32_t usb_up_int; /*USB interrupt test mode*/
73  volatile uint32_t _otg4b[1]; /*13Ch 4 Reserved */
74 
75  /* Operational registers */
76  volatile uint32_t usbcmd; /*USB command*/
77  volatile uint32_t usbsts; /*USB status*/
78  volatile uint32_t usbintr; /*USB interrupt enable*/
79  volatile uint32_t frindex; /*USB frame index*/
80  volatile uint32_t _otg5[1];
81  volatile uint32_t periodiclistbase__deviceaddr; /*Frame list base address__USB device address*/
82  volatile uint32_t asynclistaddr__endpointlistaddr; /*Next asynchronous list address__Address of endpoint list in memory*/
83  volatile uint32_t ttctrl; /*Asynchronous buffer status for embedded TT*/
84  volatile uint32_t burstsize; /*Programmable burst size*/
85  volatile uint32_t txfilltuning; /*Host transmit pre-buffer packet tuning*/
86  volatile uint32_t txttfilltuning;/*Host TT transmit pre-buffer packet tuning*/
87  volatile uint32_t _otg6[1];
88  volatile uint32_t _otg7[2]; /*170h-174h 8 Reserved n/a*/
89  volatile uint32_t endptnak;
90  volatile uint32_t endptnaken;
91  volatile uint32_t configflag; /*Configured flag register*/
92  volatile uint32_t portsc1; /*Port status/control 1*/
93  volatile uint32_t _otg8[7]; /*190h-1A3h 20 Reserved n/a*/
94  volatile uint32_t otgsc; /*OTG status and control*/
95  volatile uint32_t usbmode; /*USB device mode*/
96  volatile uint32_t endptsetupstat;/*Endpoint setup status*/
97  volatile uint32_t endptprime; /*Endpoint initialization*/
98  volatile uint32_t endptflush; /*Endpoint de-initialization*/
99  volatile uint32_t endptstatus; /*Endpoint status*/
100  volatile uint32_t endptcomplete; /*Endpoint complete*/
101  volatile uint32_t endptctrl[4]; /*Endpoint control 0 - 3*/
102 
104 
105 /* dTD Transfer Description */
106 typedef volatile struct
107 {
108  volatile uint32_t next_dTD;
109  volatile uint32_t total_bytes ;
110  volatile uint32_t buffer0;
111  volatile uint32_t buffer1;
112  volatile uint32_t buffer2;
113  volatile uint32_t buffer3;
114  volatile uint32_t buffer4;
115  volatile uint32_t reserved;
116 } DTD_T;
117 
118 /* dQH Queue Head */
119 typedef volatile struct
120 {
121  volatile uint32_t cap;
122  volatile uint32_t curr_dTD;
123  volatile uint32_t next_dTD;
124  volatile uint32_t total_bytes;
125  volatile uint32_t buffer0;
126  volatile uint32_t buffer1;
127  volatile uint32_t buffer2;
128  volatile uint32_t buffer3;
129  volatile uint32_t buffer4;
130  volatile uint32_t reserved;
131  volatile uint32_t setup[2];
132  volatile uint32_t gap[4];
133 } DQH_T;
134 
135 
136 /* bit defines for USBCMD register */
137 #define USBCMD_RS _BIT(0)
138 #define USBCMD_RST _BIT(1)
139 #define USBCMD_ATDTW _BIT(12)
140 #define USBCMD_SUTW _BIT(13)
141 
142 /* bit defines for USBSTS register */
143 #define USBSTS_UI _BIT(0)
144 #define USBSTS_UEI _BIT(1)
145 #define USBSTS_PCI _BIT(2)
146 #define USBSTS_URI _BIT(6)
147 #define USBSTS_SRI _BIT(7)
148 #define USBSTS_SLI _BIT(8)
149 #define USBSTS_NAKI _BIT(16)
150 
151 /* bit defines for DEVICEADDR register */
152 #define USBDEV_ADDR_AD _BIT(24)
153 #define USBDEV_ADDR(n) _SBF(25, ((n) & 0x7F))
154 
155 /* bit defines for PRTSC1 register */
156 #define USBPRTS_CCS _BIT(0)
157 #define USBPRTS_PE _BIT(2)
158 #define USBPRTS_FPR _BIT(6)
159 #define USBPRTS_SUSP _BIT(7)
160 #define USBPRTS_PR _BIT(8)
161 #define USBPRTS_HSP _BIT(9)
162 #define USBPRTS_PLPSCD _BIT(23)
163 #define USBPRTS_PFSC _BIT(24)
164 
165 /* bit defines for USBMODE register */
166 #define USBMODE_CM_IDLE _SBF(0, 0x0)
167 #define USBMODE_CM_DEV _SBF(0, 0x2)
168 #define USBMODE_CM_HOST _SBF(0, 0x3)
169 #define USBMODE_SLOM _BIT(3)
170 #define USBMODE_SDIS _BIT(4)
171 
172 /* bit defines for EP registers*/
173 #define USB_EP_BITPOS(n) (((n) & 0x80)? (0x10 | ((n) & 0x7)) : ((n) & 0x7))
174 
175 /* bit defines EPcontrol registers*/
176 #define EPCTRL_RXS _BIT(0)
177 #define EPCTRL_RX_TYPE(n) _SBF(2,((n) & 0x3))
178 #define EPCTRL_RX_CTL _SBF(2,0)
179 #define EPCTRL_RX_ISO _SBF(2,1)
180 #define EPCTRL_RX_BLK _SBF(2,2)
181 #define EPCTRL_RXI _BIT(5)
182 #define EPCTRL_RXR _BIT(6)
183 #define EPCTRL_RXE _BIT(7)
184 #define EPCTRL_TXS _BIT(16)
185 #define EPCTRL_TX_TYPE(n) _SBF(18,((n) & 0x3))
186 #define EPCTRL_TX_CTL _SBF(18,0)
187 #define EPCTRL_TX_ISO _SBF(18,1)
188 #define EPCTRL_TX_BLK _SBF(18,2)
189 #define EPCTRL_TX_INT _SBF(18,3)
190 #define EPCTRL_TXI _BIT(21)
191 #define EPCTRL_TXR _BIT(22)
192 #define EPCTRL_TXE _BIT(23)
193 
194 /* dQH field and bit defines */
195 /* Temp fixed on max, should be taken out of table */
196 #define QH_MAX_PKT_LEN_POS 16
197 #define QH_MAXP(n) _SBF(16,((n) & 0x7FF))
198 #define QH_IOS _BIT(15)
199 #define QH_ZLT _BIT(29)
200 #define QH_MULT(n) _SBF(30,((n) & 0x3))
201 #define QH_MULT_MASK _SBF(30, 0x3)
202 
203 /* dTD field and bit defines */
204 #define TD_NEXT_TERMINATE _BIT(0)
205 #define TD_IOC _BIT(15)
206 
207 #ifdef __cplusplus
208 }
209 #endif
210 
211 #endif /* HW_USBD_IP9208_H */
Definition: hw_usbd_ip9028.h:106
Definition: hw_usbd_ip9028.h:58
Definition: hw_usbd_ip9028.h:119