///////////////////////////////////////////////////////////////////////////////
//                                                                            /
// IAR ANSI C/C++ Compiler V6.30.1.53127/W32 for ARM    08/Mar/2012  18:18:29 /
// Copyright 1999-2011 IAR Systems AB.                                        /
//                                                                            /
//    Cpu mode     =  thumb                                                   /
//    Endian       =  little                                                  /
//    Source file  =  D:\Profiles\b01252\My Documents\Freescale\P0\software\s /
//                    ample code cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50MHz_ /
//                    sc\src\cpu\arm_cm4.c                                    /
//    Command line =  "D:\Profiles\b01252\My Documents\Freescale\P0\software\ /
//                    sample code cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50MHz /
//                    _sc\src\cpu\arm_cm4.c" -D IAR -D TOWER -D TWR_K20D50M   /
//                    -lCN "D:\Profiles\b01252\My                             /
//                    Documents\Freescale\P0\software\sample code             /
//                    cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50MHz_sc\build\ia /
//                    r\TWRK20D50M_Demo\FLASH_128KB_PFLASH\List\" -lB         /
//                    "D:\Profiles\b01252\My Documents\Freescale\P0\software\ /
//                    sample code cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50MHz /
//                    _sc\build\iar\TWRK20D50M_Demo\FLASH_128KB_PFLASH\List\" /
//                     -o "D:\Profiles\b01252\My                              /
//                    Documents\Freescale\P0\software\sample code             /
//                    cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50MHz_sc\build\ia /
//                    r\TWRK20D50M_Demo\FLASH_128KB_PFLASH\Obj\" --no_cse     /
//                    --no_unroll --no_inline --no_code_motion --no_tbaa      /
//                    --no_clustering --no_scheduling --debug                 /
//                    --endian=little --cpu=Cortex-M4 -e --fpu=None           /
//                    --dlib_config "C:\Program Files\IAR Systems\Embedded    /
//                    Workbench 6.0_5\arm\INC\c\DLib_Config_Normal.h" -I      /
//                    "D:\Profiles\b01252\My Documents\Freescale\P0\software\ /
//                    sample code cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50MHz /
//                    _sc\build\iar\TWRK20D50M_Demo\..\..\..\src\common\" -I  /
//                    "D:\Profiles\b01252\My Documents\Freescale\P0\software\ /
//                    sample code cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50MHz /
//                    _sc\build\iar\TWRK20D50M_Demo\..\..\..\src\cpu\" -I     /
//                    "D:\Profiles\b01252\My Documents\Freescale\P0\software\ /
//                    sample code cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50MHz /
//                    _sc\build\iar\TWRK20D50M_Demo\..\..\..\src\cpu\headers\ /
//                    " -I "D:\Profiles\b01252\My                             /
//                    Documents\Freescale\P0\software\sample code             /
//                    cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50MHz_sc\build\ia /
//                    r\TWRK20D50M_Demo\..\..\..\src\drivers\uart\" -I        /
//                    "D:\Profiles\b01252\My Documents\Freescale\P0\software\ /
//                    sample code cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50MHz /
//                    _sc\build\iar\TWRK20D50M_Demo\..\..\..\src\drivers\mcg\ /
//                    " -I "D:\Profiles\b01252\My                             /
//                    Documents\Freescale\P0\software\sample code             /
//                    cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50MHz_sc\build\ia /
//                    r\TWRK20D50M_Demo\..\..\..\src\drivers\wdog\" -I        /
//                    "D:\Profiles\b01252\My Documents\Freescale\P0\software\ /
//                    sample code cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50MHz /
//                    _sc\build\iar\TWRK20D50M_Demo\..\..\..\src\drivers\rcm\ /
//                    " -I "D:\Profiles\b01252\My                             /
//                    Documents\Freescale\P0\software\sample code             /
//                    cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50MHz_sc\build\ia /
//                    r\TWRK20D50M_Demo\..\..\..\src\drivers\lptmr\" -I       /
//                    "D:\Profiles\b01252\My Documents\Freescale\P0\software\ /
//                    sample code cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50MHz /
//                    _sc\build\iar\TWRK20D50M_Demo\..\..\..\src\platforms\"  /
//                    -I "D:\Profiles\b01252\My Documents\Freescale\P0\softwa /
//                    re\sample code cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50 /
//                    MHz_sc\build\iar\TWRK20D50M_Demo\..\" -I                /
//                    "D:\Profiles\b01252\My Documents\Freescale\P0\software\ /
//                    sample code cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50MHz /
//                    _sc\build\iar\TWRK20D50M_Demo\..\..\..\src\projects\TWR /
//                    K20D50M_Demo\" -I "D:\Profiles\b01252\My                /
//                    Documents\Freescale\P0\software\sample code             /
//                    cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50MHz_sc\build\ia /
//                    r\TWRK20D50M_Demo\..\..\..\src\projects\TWRK20D50M_Demo /
//                    \dma\" -I "D:\Profiles\b01252\My                        /
//                    Documents\Freescale\P0\software\sample code             /
//                    cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50MHz_sc\build\ia /
//                    r\TWRK20D50M_Demo\..\..\..\src\projects\TWRK20D50M_Demo /
//                    \adc16\" -I "D:\Profiles\b01252\My                      /
//                    Documents\Freescale\P0\software\sample code             /
//                    cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50MHz_sc\build\ia /
//                    r\TWRK20D50M_Demo\..\..\..\src\projects\TWRK20D50M_Demo /
//                    \i2c\" -I "D:\Profiles\b01252\My                        /
//                    Documents\Freescale\P0\software\sample code             /
//                    cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50MHz_sc\build\ia /
//                    r\TWRK20D50M_Demo\..\..\..\src\projects\TWRK20D50M_Demo /
//                    \tsi\" -I "D:\Profiles\b01252\My                        /
//                    Documents\Freescale\P0\software\sample code             /
//                    cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50MHz_sc\build\ia /
//                    r\TWRK20D50M_Demo\..\..\..\src\projects\TWRK20D50M_Demo /
//                    \adc_test\" -I "D:\Profiles\b01252\My                   /
//                    Documents\Freescale\P0\software\sample code             /
//                    cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50MHz_sc\build\ia /
//                    r\TWRK20D50M_Demo\..\..\..\src\projects\TWRK20D50M_Demo /
//                    \angle_calculation\" -I "D:\Profiles\b01252\My          /
//                    Documents\Freescale\P0\software\sample code             /
//                    cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50MHz_sc\build\ia /
//                    r\TWRK20D50M_Demo\..\..\..\src\projects\TWRK20D50M_Demo /
//                    \buzzer\" -I "D:\Profiles\b01252\My                     /
//                    Documents\Freescale\P0\software\sample code             /
//                    cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50MHz_sc\build\ia /
//                    r\TWRK20D50M_Demo\..\..\..\src\projects\TWRK20D50M_Demo /
//                    \fft_test\" -I "D:\Profiles\b01252\My                   /
//                    Documents\Freescale\P0\software\sample code             /
//                    cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50MHz_sc\build\ia /
//                    r\TWRK20D50M_Demo\..\..\..\src\projects\TWRK20D50M_Demo /
//                    \irda_test\" -I "D:\Profiles\b01252\My                  /
//                    Documents\Freescale\P0\software\sample code             /
//                    cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50MHz_sc\build\ia /
//                    r\TWRK20D50M_Demo\..\..\..\src\projects\TWRK20D50M_Demo /
//                    \cmt_test\" -I "D:\Profiles\b01252\My                   /
//                    Documents\Freescale\P0\software\sample code             /
//                    cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50MHz_sc\build\ia /
//                    r\TWRK20D50M_Demo\..\..\..\src\projects\TWRK20D50M_Demo /
//                    \protocol\" -I "D:\Profiles\b01252\My                   /
//                    Documents\Freescale\P0\software\sample code             /
//                    cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50MHz_sc\build\ia /
//                    r\TWRK20D50M_Demo\..\..\..\src\projects\TWRK20D50M_Demo /
//                    \task_mgr\" -I "D:\Profiles\b01252\My                   /
//                    Documents\Freescale\P0\software\sample code             /
//                    cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50MHz_sc\build\ia /
//                    r\TWRK20D50M_Demo\..\..\..\src\projects\TWRK20D50M_Demo /
//                    \TWRK20_specific\" -I "D:\Profiles\b01252\My            /
//                    Documents\Freescale\P0\software\sample code             /
//                    cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50MHz_sc\build\ia /
//                    r\TWRK20D50M_Demo\..\..\..\src\projects\TWRK20D50M_Demo /
//                    \rtc\" -I "D:\Profiles\b01252\My                        /
//                    Documents\Freescale\P0\software\sample code             /
//                    cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50MHz_sc\build\ia /
//                    r\TWRK20D50M_Demo\..\..\..\src\CMSIS\DSP_Lib\Lib\interm /
//                    ediateFiles\" -I "D:\Profiles\b01252\My                 /
//                    Documents\Freescale\P0\software\sample code             /
//                    cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50MHz_sc\build\ia /
//                    r\TWRK20D50M_Demo\..\..\..\src\CMSIS\DSP_Lib\Include\"  /
//                    -I "D:\Profiles\b01252\My Documents\Freescale\P0\softwa /
//                    re\sample code cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50 /
//                    MHz_sc\build\iar\TWRK20D50M_Demo\..\..\..\src\CMSIS\CM4 /
//                    \DeviceSupport\ARM\ARMCM4\" -I "D:\Profiles\b01252\My   /
//                    Documents\Freescale\P0\software\sample code             /
//                    cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50MHz_sc\build\ia /
//                    r\TWRK20D50M_Demo\..\..\..\src\CMSIS\CM4\CoreSupport\"  /
//                    -I "D:\Profiles\b01252\My Documents\Freescale\P0\softwa /
//                    re\sample code cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50 /
//                    MHz_sc\build\iar\TWRK20D50M_Demo\..\..\..\src\CMSIS\CM4 /
//                    \CoreSupportLiker Options-Library\" -I                  /
//                    "D:\Profiles\b01252\My Documents\Freescale\P0\software\ /
//                    sample code cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50MHz /
//                    _sc\build\iar\TWRK20D50M_Demo\..\..\..\src\CMSIS\DSP_Li /
//                    b\Lib\intermediateFiles\arm_cortexM4_math.lib\" -I      /
//                    "D:\Profiles\b01252\My Documents\Freescale\P0\software\ /
//                    sample code cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50MHz /
//                    _sc\build\iar\TWRK20D50M_Demo\..\..\..\build\" -Ol      /
//                    --use_c++_inline -I "C:\Program Files\IAR               /
//                    Systems\Embedded Workbench 6.0_5\arm\CMSIS\Include\"    /
//                    -D ARM_MATH_CM4                                         /
//    List file    =  D:\Profiles\b01252\My Documents\Freescale\P0\software\s /
//                    ample code cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50MHz_ /
//                    sc\build\iar\TWRK20D50M_Demo\FLASH_128KB_PFLASH\List\ar /
//                    m_cm4.s                                                 /
//                                                                            /
//                                                                            /
///////////////////////////////////////////////////////////////////////////////

        NAME arm_cm4

        #define SHT_PROGBITS 0x1

        EXTERN printf

        PUBLIC disable_irq
        PUBLIC enable_irq
        PUBLIC set_irq_priority
        PUBLIC stop
        PUBLIC wait
        PUBLIC write_vtor

// D:\Profiles\b01252\My Documents\Freescale\P0\software\sample code cesar\TWR-K20D50M_LABS_AND_CE\kinetis_50MHz_sc\src\cpu\arm_cm4.c
//    1 /*
//    2  * File:		arm_cm4.c
//    3  * Purpose:		Generic high-level routines for ARM Cortex M4 processors
//    4  *
//    5  * Notes:
//    6  */
//    7 
//    8 #include "common.h"
//    9 
//   10 /***********************************************************************/
//   11 /*
//   12  * Configures the ARM system control register for STOP (deep sleep) mode
//   13  * and then executes the WFI instruction to enter the mode.
//   14  *
//   15  * Parameters:
//   16  * none
//   17  *
//   18  * Note: Might want to change this later to allow for passing in a parameter
//   19  *       to optionally set the sleep on exit bit.
//   20  */
//   21 

        SECTION `.text`:CODE:NOROOT(2)
        THUMB
//   22 void stop (void)
//   23 {
//   24 	/* Set the SLEEPDEEP bit to enable deep sleep mode (STOP) */
//   25 	SCB_SCR |= SCB_SCR_SLEEPDEEP_MASK;	
stop:
        LDR.N    R0,??DataTable5  ;; 0xe000ed10
        LDR      R0,[R0, #+0]
        ORRS     R0,R0,#0x4
        LDR.N    R1,??DataTable5  ;; 0xe000ed10
        STR      R0,[R1, #+0]
//   26 
//   27 	/* WFI instruction will start entry into STOP mode */
//   28 #ifndef KEIL
//   29 	asm("WFI");
        WFI              
//   30 #else
//   31 	__wfi();
//   32 #endif
//   33 }
        BX       LR               ;; return
//   34 /***********************************************************************/
//   35 /*
//   36  * Configures the ARM system control register for WAIT (sleep) mode
//   37  * and then executes the WFI instruction to enter the mode.
//   38  *
//   39  * Parameters:
//   40  * none
//   41  *
//   42  * Note: Might want to change this later to allow for passing in a parameter
//   43  *       to optionally set the sleep on exit bit.
//   44  */
//   45 

        SECTION `.text`:CODE:NOROOT(2)
        THUMB
//   46 void wait (void)
//   47 {
//   48 	/* Clear the SLEEPDEEP bit to make sure we go into WAIT (sleep) mode instead
//   49 	 * of deep sleep.
//   50 	 */
//   51 	SCB_SCR &= ~SCB_SCR_SLEEPDEEP_MASK;	
wait:
        LDR.N    R0,??DataTable5  ;; 0xe000ed10
        LDR      R0,[R0, #+0]
        BICS     R0,R0,#0x4
        LDR.N    R1,??DataTable5  ;; 0xe000ed10
        STR      R0,[R1, #+0]
//   52 
//   53 	/* WFI instruction will start entry into WAIT mode */
//   54 #ifndef KEIL
//   55 	asm("WFI");
        WFI              
//   56 #else
//   57     __wfi();
//   58 #endif
//   59 }
        BX       LR               ;; return
//   60 /***********************************************************************/
//   61 /*
//   62  * Change the value of the vector table offset register to the specified value.
//   63  *
//   64  * Parameters:
//   65  * vtor     new value to write to the VTOR
//   66  */
//   67 

        SECTION `.text`:CODE:NOROOT(1)
        THUMB
//   68 void write_vtor (int vtor)
//   69 {
//   70         /* Write the VTOR with the new value */
//   71         SCB_VTOR = vtor;	
write_vtor:
        LDR.N    R1,??DataTable5_1  ;; 0xe000ed08
        STR      R0,[R1, #+0]
//   72 }
        BX       LR               ;; return
//   73 /***********************************************************************/
//   74 /*
//   75  * Initialize the NVIC to enable the specified IRQ.
//   76  * 
//   77  * NOTE: The function only initializes the NVIC to enable a single IRQ. 
//   78  * Interrupts will also need to be enabled in the ARM core. This can be 
//   79  * done using the EnableInterrupts macro.
//   80  *
//   81  * Parameters:
//   82  * irq    irq number to be enabled (the irq number NOT the vector number)
//   83  */
//   84 

        SECTION `.text`:CODE:NOROOT(1)
        THUMB
//   85 void enable_irq (int irq)
//   86 {
enable_irq:
        PUSH     {R4,LR}
        MOVS     R4,R0
//   87     int div;
//   88     
//   89     /* Make sure that the IRQ is an allowable number. Right now up to 61 is 
//   90      * used.
//   91      */
//   92     if (irq > 61)
        CMP      R4,#+62
        BLT.N    ??enable_irq_0
//   93         printf("\nERR! Invalid IRQ value passed to enable irq function!\n");
        LDR.N    R0,??DataTable5_2
        BL       printf
//   94     
//   95     /* Determine which of the NVICISERs corresponds to the irq */
//   96     div = irq/32;
??enable_irq_0:
        MOVS     R0,#+32
        SDIV     R0,R4,R0
//   97     
//   98     switch (div)
        CMP      R0,#+0
        BEQ.N    ??enable_irq_1
        CMP      R0,#+2
        BEQ.N    ??enable_irq_2
        BCC.N    ??enable_irq_3
        B.N      ??enable_irq_4
//   99     {
//  100     	case 0x0:
//  101               NVICICPR0 = 1 << (irq%32);
??enable_irq_1:
        MOVS     R0,#+1
        MOVS     R1,#+32
        SDIV     R2,R4,R1
        MLS      R2,R2,R1,R4
        LSLS     R0,R0,R2
        LDR.N    R1,??DataTable5_3  ;; 0xe000e280
        STR      R0,[R1, #+0]
//  102               NVICISER0 = 1 << (irq%32);
        MOVS     R0,#+1
        MOVS     R1,#+32
        SDIV     R2,R4,R1
        MLS      R2,R2,R1,R4
        LSLS     R0,R0,R2
        LDR.N    R1,??DataTable5_4  ;; 0xe000e100
        STR      R0,[R1, #+0]
//  103               break;
        B.N      ??enable_irq_4
//  104     	case 0x1:
//  105               NVICICPR1 = 1 << (irq%32);
??enable_irq_3:
        MOVS     R0,#+1
        MOVS     R1,#+32
        SDIV     R2,R4,R1
        MLS      R2,R2,R1,R4
        LSLS     R0,R0,R2
        LDR.N    R1,??DataTable5_5  ;; 0xe000e284
        STR      R0,[R1, #+0]
//  106               NVICISER1 = 1 << (irq%32);
        MOVS     R0,#+1
        MOVS     R1,#+32
        SDIV     R2,R4,R1
        MLS      R2,R2,R1,R4
        LSLS     R0,R0,R2
        LDR.N    R1,??DataTable5_6  ;; 0xe000e104
        STR      R0,[R1, #+0]
//  107               break;
        B.N      ??enable_irq_4
//  108     	case 0x2:
//  109               NVICICPR2 = 1 << (irq%32);
??enable_irq_2:
        MOVS     R0,#+1
        MOVS     R1,#+32
        SDIV     R2,R4,R1
        MLS      R2,R2,R1,R4
        LSLS     R0,R0,R2
        LDR.N    R1,??DataTable5_7  ;; 0xe000e288
        STR      R0,[R1, #+0]
//  110               NVICISER2 = 1 << (irq%32);
        MOVS     R0,#+1
        MOVS     R1,#+32
        SDIV     R2,R4,R1
        MLS      R2,R2,R1,R4
        LSLS     R0,R0,R2
        LDR.N    R1,??DataTable5_8  ;; 0xe000e108
        STR      R0,[R1, #+0]
//  111               break;
//  112     }              
//  113 }
??enable_irq_4:
        POP      {R4,PC}          ;; return
//  114 /***********************************************************************/
//  115 /*
//  116  * Initialize the NVIC to disable the specified IRQ.
//  117  * 
//  118  * NOTE: The function only initializes the NVIC to disable a single IRQ. 
//  119  * If you want to disable all interrupts, then use the DisableInterrupts
//  120  * macro instead. 
//  121  *
//  122  * Parameters:
//  123  * irq    irq number to be disabled (the irq number NOT the vector number)
//  124  */
//  125 

        SECTION `.text`:CODE:NOROOT(1)
        THUMB
//  126 void disable_irq (int irq)
//  127 {
disable_irq:
        PUSH     {R4,LR}
        MOVS     R4,R0
//  128     int div;
//  129     
//  130     /* Make sure that the IRQ is an allowable number. Right now up to 91 is 
//  131      * used.
//  132      */
//  133     if (irq > 91)
        CMP      R4,#+92
        BLT.N    ??disable_irq_0
//  134         printf("\nERR! Invalid IRQ value passed to disable irq function!\n");
        LDR.N    R0,??DataTable5_9
        BL       printf
//  135     
//  136     /* Determine which of the NVICICERs corresponds to the irq */
//  137     div = irq/32;
??disable_irq_0:
        MOVS     R0,#+32
        SDIV     R0,R4,R0
//  138     
//  139     switch (div)
        CMP      R0,#+0
        BEQ.N    ??disable_irq_1
        CMP      R0,#+2
        BEQ.N    ??disable_irq_2
        BCC.N    ??disable_irq_3
        B.N      ??disable_irq_4
//  140     {
//  141     	case 0x0:
//  142                NVICICER0 = 1 << (irq%32);
??disable_irq_1:
        MOVS     R0,#+1
        MOVS     R1,#+32
        SDIV     R2,R4,R1
        MLS      R2,R2,R1,R4
        LSLS     R0,R0,R2
        LDR.N    R1,??DataTable5_10  ;; 0xe000e180
        STR      R0,[R1, #+0]
//  143               break;
        B.N      ??disable_irq_4
//  144     	case 0x1:
//  145               NVICICER1 = 1 << (irq%32);
??disable_irq_3:
        MOVS     R0,#+1
        MOVS     R1,#+32
        SDIV     R2,R4,R1
        MLS      R2,R2,R1,R4
        LSLS     R0,R0,R2
        LDR.N    R1,??DataTable5_11  ;; 0xe000e184
        STR      R0,[R1, #+0]
//  146               break;
        B.N      ??disable_irq_4
//  147     	case 0x2:
//  148               NVICICER2 = 1 << (irq%32);
??disable_irq_2:
        MOVS     R0,#+1
        MOVS     R1,#+32
        SDIV     R2,R4,R1
        MLS      R2,R2,R1,R4
        LSLS     R0,R0,R2
        LDR.N    R1,??DataTable5_12  ;; 0xe000e188
        STR      R0,[R1, #+0]
//  149               break;
//  150     }              
//  151 }
??disable_irq_4:
        POP      {R4,PC}          ;; return
//  152 /***********************************************************************/
//  153 /*
//  154  * Initialize the NVIC to set specified IRQ priority.
//  155  * 
//  156  * NOTE: The function only initializes the NVIC to set a single IRQ priority. 
//  157  * Interrupts will also need to be enabled in the ARM core. This can be 
//  158  * done using the EnableInterrupts macro.
//  159  *
//  160  * Parameters:
//  161  * irq    irq number to be enabled (the irq number NOT the vector number)
//  162  * prio   irq priority. 0-15 levels. 0 max priority
//  163  */
//  164 

        SECTION `.text`:CODE:NOROOT(1)
        THUMB
//  165 void set_irq_priority (int irq, int prio)
//  166 {
set_irq_priority:
        PUSH     {R3-R5,LR}
        MOVS     R4,R0
        MOVS     R5,R1
//  167     /*irq priority pointer*/
//  168     uint8 *prio_reg;
//  169     
//  170     /* Make sure that the IRQ is an allowable number. Right now up to 91 is 
//  171      * used.
//  172      */
//  173     if (irq > 91)
        CMP      R4,#+92
        BLT.N    ??set_irq_priority_0
//  174         printf("\nERR! Invalid IRQ value passed to priority irq function!\n");
        LDR.N    R0,??DataTable5_13
        BL       printf
//  175 
//  176     if (prio > 15)
??set_irq_priority_0:
        CMP      R5,#+16
        BLT.N    ??set_irq_priority_1
//  177         printf("\nERR! Invalid priority value passed to priority irq function!\n");
        LDR.N    R0,??DataTable5_14
        BL       printf
//  178     
//  179     /* Determine which of the NVICIPx corresponds to the irq */
//  180     prio_reg = (uint8 *)(((uint32)&NVICIP0) + irq);
??set_irq_priority_1:
        ADD      R0,R4,#-536870912
        ADDS     R0,R0,#+58368
//  181     /* Assign priority to IRQ */
//  182     *prio_reg = ( (prio&0xF) << (8 - ARM_INTERRUPT_LEVEL_BITS) );             
        LSLS     R1,R5,#+4
        STRB     R1,[R0, #+0]
//  183 }
        POP      {R0,R4,R5,PC}    ;; return

        SECTION `.text`:CODE:NOROOT(2)
        SECTION_TYPE SHT_PROGBITS, 0
        DATA
??DataTable5:
        DC32     0xe000ed10

        SECTION `.text`:CODE:NOROOT(2)
        SECTION_TYPE SHT_PROGBITS, 0
        DATA
??DataTable5_1:
        DC32     0xe000ed08

        SECTION `.text`:CODE:NOROOT(2)
        SECTION_TYPE SHT_PROGBITS, 0
        DATA
??DataTable5_2:
        DC32     `?<Constant "\\nERR! Invalid IRQ val...">`

        SECTION `.text`:CODE:NOROOT(2)
        SECTION_TYPE SHT_PROGBITS, 0
        DATA
??DataTable5_3:
        DC32     0xe000e280

        SECTION `.text`:CODE:NOROOT(2)
        SECTION_TYPE SHT_PROGBITS, 0
        DATA
??DataTable5_4:
        DC32     0xe000e100

        SECTION `.text`:CODE:NOROOT(2)
        SECTION_TYPE SHT_PROGBITS, 0
        DATA
??DataTable5_5:
        DC32     0xe000e284

        SECTION `.text`:CODE:NOROOT(2)
        SECTION_TYPE SHT_PROGBITS, 0
        DATA
??DataTable5_6:
        DC32     0xe000e104

        SECTION `.text`:CODE:NOROOT(2)
        SECTION_TYPE SHT_PROGBITS, 0
        DATA
??DataTable5_7:
        DC32     0xe000e288

        SECTION `.text`:CODE:NOROOT(2)
        SECTION_TYPE SHT_PROGBITS, 0
        DATA
??DataTable5_8:
        DC32     0xe000e108

        SECTION `.text`:CODE:NOROOT(2)
        SECTION_TYPE SHT_PROGBITS, 0
        DATA
??DataTable5_9:
        DC32     `?<Constant "\\nERR! Invalid IRQ val...">_1`

        SECTION `.text`:CODE:NOROOT(2)
        SECTION_TYPE SHT_PROGBITS, 0
        DATA
??DataTable5_10:
        DC32     0xe000e180

        SECTION `.text`:CODE:NOROOT(2)
        SECTION_TYPE SHT_PROGBITS, 0
        DATA
??DataTable5_11:
        DC32     0xe000e184

        SECTION `.text`:CODE:NOROOT(2)
        SECTION_TYPE SHT_PROGBITS, 0
        DATA
??DataTable5_12:
        DC32     0xe000e188

        SECTION `.text`:CODE:NOROOT(2)
        SECTION_TYPE SHT_PROGBITS, 0
        DATA
??DataTable5_13:
        DC32     `?<Constant "\\nERR! Invalid IRQ val...">_2`

        SECTION `.text`:CODE:NOROOT(2)
        SECTION_TYPE SHT_PROGBITS, 0
        DATA
??DataTable5_14:
        DC32     `?<Constant "\\nERR! Invalid priorit...">`

        SECTION `.iar_vfe_header`:DATA:REORDER:NOALLOC:NOROOT(2)
        SECTION_TYPE SHT_PROGBITS, 0
        DATA
        DC32 0

        SECTION __DLIB_PERTHREAD:DATA:REORDER:NOROOT(0)
        SECTION_TYPE SHT_PROGBITS, 0

        SECTION __DLIB_PERTHREAD_init:DATA:REORDER:NOROOT(0)
        SECTION_TYPE SHT_PROGBITS, 0

        SECTION `.rodata`:CONST:REORDER:NOROOT(2)
`?<Constant "\\nERR! Invalid IRQ val...">`:
        DATA
        DC8 0AH, 45H, 52H, 52H, 21H, 20H, 49H, 6EH
        DC8 76H, 61H, 6CH, 69H, 64H, 20H, 49H, 52H
        DC8 51H, 20H, 76H, 61H, 6CH, 75H, 65H, 20H
        DC8 70H, 61H, 73H, 73H, 65H, 64H, 20H, 74H
        DC8 6FH, 20H, 65H, 6EH, 61H, 62H, 6CH, 65H
        DC8 20H, 69H, 72H, 71H, 20H, 66H, 75H, 6EH
        DC8 63H, 74H, 69H, 6FH, 6EH, 21H, 0AH, 0

        SECTION `.rodata`:CONST:REORDER:NOROOT(2)
`?<Constant "\\nERR! Invalid IRQ val...">_1`:
        DATA
        DC8 0AH, 45H, 52H, 52H, 21H, 20H, 49H, 6EH
        DC8 76H, 61H, 6CH, 69H, 64H, 20H, 49H, 52H
        DC8 51H, 20H, 76H, 61H, 6CH, 75H, 65H, 20H
        DC8 70H, 61H, 73H, 73H, 65H, 64H, 20H, 74H
        DC8 6FH, 20H, 64H, 69H, 73H, 61H, 62H, 6CH
        DC8 65H, 20H, 69H, 72H, 71H, 20H, 66H, 75H
        DC8 6EH, 63H, 74H, 69H, 6FH, 6EH, 21H, 0AH
        DC8 0
        DC8 0, 0, 0

        SECTION `.rodata`:CONST:REORDER:NOROOT(2)
`?<Constant "\\nERR! Invalid IRQ val...">_2`:
        DATA
        DC8 0AH, 45H, 52H, 52H, 21H, 20H, 49H, 6EH
        DC8 76H, 61H, 6CH, 69H, 64H, 20H, 49H, 52H
        DC8 51H, 20H, 76H, 61H, 6CH, 75H, 65H, 20H
        DC8 70H, 61H, 73H, 73H, 65H, 64H, 20H, 74H
        DC8 6FH, 20H, 70H, 72H, 69H, 6FH, 72H, 69H
        DC8 74H, 79H, 20H, 69H, 72H, 71H, 20H, 66H
        DC8 75H, 6EH, 63H, 74H, 69H, 6FH, 6EH, 21H
        DC8 0AH, 0
        DC8 0, 0

        SECTION `.rodata`:CONST:REORDER:NOROOT(2)
`?<Constant "\\nERR! Invalid priorit...">`:
        DATA
        DC8 0AH, 45H, 52H, 52H, 21H, 20H, 49H, 6EH
        DC8 76H, 61H, 6CH, 69H, 64H, 20H, 70H, 72H
        DC8 69H, 6FH, 72H, 69H, 74H, 79H, 20H, 76H
        DC8 61H, 6CH, 75H, 65H, 20H, 70H, 61H, 73H
        DC8 73H, 65H, 64H, 20H, 74H, 6FH, 20H, 70H
        DC8 72H, 69H, 6FH, 72H, 69H, 74H, 79H, 20H
        DC8 69H, 72H, 71H, 20H, 66H, 75H, 6EH, 63H
        DC8 74H, 69H, 6FH, 6EH, 21H, 0AH, 0
        DC8 0

        END
//  184 /***********************************************************************/
//  185 
// 
// 240 bytes in section .rodata
// 376 bytes in section .text
// 
// 376 bytes of CODE  memory
// 240 bytes of CONST memory
//
//Errors: none
//Warnings: none
