/** ###################################################################
**     THIS COMPONENT MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
**     Filename    : Vectors.c
**     Project     : ProcessorExpert
**     Processor   : MC56F84789VLL
**     Version     : Component 01.066, Driver 01.00, CPU db: 3.50.001
**     Compiler    : Metrowerks DSP C Compiler
**     Date/Time   : 2012-07-05, 11:57, # CodeGen: 44
**     Abstract    :
**
**     Settings    :
**
**
**     Copyright : 1997 - 2012 Freescale Semiconductor, Inc. All Rights Reserved.
**     
**     http      : www.freescale.com
**     mail      : support@freescale.com
** ###################################################################*/

#include "Cpu.h"
#include "Timer.h"
#include "Cap1.h"
#include "Bit1.h"
#include "TEST1.h"
#include "Events.h"

#ifndef _lint

extern void _EntryPoint(void);         /* Startup routine */

volatile asm void _vect(void);
#pragma define_section interrupt_vectors "interrupt_vectors.text"  RX
#pragma section interrupt_vectors begin
volatile asm void _vect(void) {
  JMP  _EntryPoint                     /* Interrupt no. 0 (Used)   - ivINT_HW_RESET */
  JMP  _EntryPoint                     /* Interrupt no. 1 (Used)   - ivINT_COP_RESET  */
  JSR  Cpu_Interrupt2                  /* Interrupt no. 2 (Unused) - ivINT_ILLEGAL_OP  */
  JSR  Cpu_Interrupt3                  /* Interrupt no. 3 (Unused) - ivINT_SWI3  */
  JSR  Cpu_Interrupt4                  /* Interrupt no. 4 (Unused) - ivINT_OVERFLOW  */
  JSR  Cpu_Interrupt5                  /* Interrupt no. 5 (Unused) - ivINT_MISALIGNED  */
  JSR  Cpu_Interrupt6                  /* Interrupt no. 6 (Unused) - ivINT_STPCNT  */
  JSR  Cpu_Interrupt7                  /* Interrupt no. 7 (Unused) - ivINT_BKPT  */
  JSR  Cpu_Interrupt8                  /* Interrupt no. 8 (Unused) - ivINT_TRBUF  */
  JSR  Cpu_Interrupt9                  /* Interrupt no. 9 (Unused) - ivINT_TX_REG  */
  JSR  Cpu_Interrupt10                 /* Interrupt no. 10 (Unused) - ivINT_RX_REG  */
  JSR  Cpu_Interrupt11                 /* Interrupt no. 11 (Unused) - ivINT_BUS_ERR  */
  JSR  Cpu_Interrupt12                 /* Interrupt no. 12 (Unused) - ivINT_PLAT_3  */
  JSR  Cpu_Interrupt13                 /* Interrupt no. 13 (Unused) - ivINT_PLAT_2  */
  JSR  Cpu_Interrupt14                 /* Interrupt no. 14 (Unused) - ivINT_PLAT_1  */
  JSR  Cpu_Interrupt15                 /* Interrupt no. 15 (Unused) - ivINT_SWI2  */
  JSR  Cpu_Interrupt16                 /* Interrupt no. 16 (Unused) - ivINT_SWI1  */
  JSR  Cpu_Interrupt17                 /* Interrupt no. 17 (Unused) - ivINT_SWI0  */
  JSR  Cpu_Interrupt18                 /* Interrupt no. 18 (Unused) - ivINT_XBARA  */
  JSR  Cpu_Interrupt19                 /* Interrupt no. 19 (Unused) - ivINT_LVI1  */
  JSR  Cpu_Interrupt20                 /* Interrupt no. 20 (Unused) - ivINT_OCCS  */
  JSR  Cpu_Interrupt21                 /* Interrupt no. 21 (Unused) - ivINT_TMRB_3  */
  JSR  Cpu_Interrupt22                 /* Interrupt no. 22 (Unused) - ivINT_TMRB_2  */
  JSR  Cpu_Interrupt23                 /* Interrupt no. 23 (Unused) - ivINT_TMRB_1  */
  JSR  Cpu_Interrupt24                 /* Interrupt no. 24 (Unused) - ivINT_TMRB_0  */
  JSR  Cpu_Interrupt25                 /* Interrupt no. 25 (Unused) - ivINT_TMRA_3  */
  JSR  Cpu_Interrupt26                 /* Interrupt no. 26 (Unused) - ivINT_TMRA_2  */
  JSR  Cpu_Interrupt27                 /* Interrupt no. 27 (Unused) - ivINT_TMRA_1  */
  JSR  Cap1_Interrupt                  /* Interrupt no. 28 (Used)   - ivINT_TMRA_0  */
  JSR  Cpu_Interrupt29                 /* Interrupt no. 29 (Unused) - ivINT_ADC12_CC1  */
  JSR  Cpu_Interrupt30                 /* Interrupt no. 30 (Unused) - ivINT_ADC12_CC0  */
  JSR  Cpu_Interrupt31                 /* Interrupt no. 31 (Unused) - ivINT_ADC12_ERR  */
  JSR  Cpu_Interrupt32                 /* Interrupt no. 32 (Unused) - ivINT_ADC16  */
  JSR  Cpu_Interrupt33                 /* Interrupt no. 33 (Unused) - ivINT_DMA3  */
  JSR  Cpu_Interrupt34                 /* Interrupt no. 34 (Unused) - ivINT_DMA2  */
  JSR  Cpu_Interrupt35                 /* Interrupt no. 35 (Unused) - ivINT_DMA1  */
  JSR  Cpu_Interrupt36                 /* Interrupt no. 36 (Unused) - ivINT_DMA0  */
  JSR  Cpu_Interrupt37                 /* Interrupt no. 37 (Unused) - ivINT_MB_OR  */
  JSR  Cpu_Interrupt38                 /* Interrupt no. 38 (Unused) - ivINT_BUS_OFF  */
  JSR  Cpu_Interrupt39                 /* Interrupt no. 39 (Unused) - ivINT_ERROR  */
  JSR  Cpu_Interrupt40                 /* Interrupt no. 40 (Unused) - ivINT_TX_WARN  */
  JSR  Cpu_Interrupt41                 /* Interrupt no. 41 (Unused) - ivINT_RX_WARN  */
  JSR  Cpu_Interrupt42                 /* Interrupt no. 42 (Unused) - ivINT_WAKEUP  */
  JSR  Cpu_Interrupt43                 /* Interrupt no. 43 (Unused) - ivINT_QSCI2_RERR  */
  JSR  Cpu_Interrupt44                 /* Interrupt no. 44 (Unused) - ivINT_QSCI2_RCV  */
  JSR  Cpu_Interrupt45                 /* Interrupt no. 45 (Unused) - ivINT_QSCI2_TIDLE  */
  JSR  Cpu_Interrupt46                 /* Interrupt no. 46 (Unused) - ivINT_QSCI2_TDRE  */
  JSR  Cpu_Interrupt47                 /* Interrupt no. 47 (Unused) - ivINT_QSCI1_RERR  */
  JSR  Cpu_Interrupt48                 /* Interrupt no. 48 (Unused) - ivINT_QSCI1_RCV  */
  JSR  Cpu_Interrupt49                 /* Interrupt no. 49 (Unused) - ivINT_QSCI1_TIDLE  */
  JSR  Cpu_Interrupt50                 /* Interrupt no. 50 (Unused) - ivINT_QSCI1_TDRE  */
  JSR  Cpu_Interrupt51                 /* Interrupt no. 51 (Unused) - ivINT_QSCI0_RERR  */
  JSR  Cpu_Interrupt52                 /* Interrupt no. 52 (Unused) - ivINT_QSCI0_RCV  */
  JSR  Cpu_Interrupt53                 /* Interrupt no. 53 (Unused) - ivINT_QSCI0_TIDLE  */
  JSR  Cpu_Interrupt54                 /* Interrupt no. 54 (Unused) - ivINT_QSCI0_TDRE  */
  JSR  Cpu_Interrupt55                 /* Interrupt no. 55 (Unused) - ivINT_QSPI2_XMIT  */
  JSR  Cpu_Interrupt56                 /* Interrupt no. 56 (Unused) - ivINT_QSPI2_RCV  */
  JSR  Cpu_Interrupt57                 /* Interrupt no. 57 (Unused) - ivINT_QSPI1_XMIT  */
  JSR  Cpu_Interrupt58                 /* Interrupt no. 58 (Unused) - ivINT_QSPI1_RCV  */
  JSR  Cpu_Interrupt59                 /* Interrupt no. 59 (Unused) - ivINT_QSPI0_XMIT  */
  JSR  Cpu_Interrupt60                 /* Interrupt no. 60 (Unused) - ivINT_QSPI0_RCV  */
  JSR  Cpu_Interrupt61                 /* Interrupt no. 61 (Unused) - ivINT_IIC1  */
  JSR  Cpu_Interrupt62                 /* Interrupt no. 62 (Unused) - ivINT_IIC0  */
  JSR  Cpu_Interrupt63                 /* Interrupt no. 63 (Unused) - ivINT_eFlexPWMB_FAULT  */
  JSR  Cpu_Interrupt64                 /* Interrupt no. 64 (Unused) - ivINT_eFlexPWMB_RERR  */
  JSR  Cpu_Interrupt65                 /* Interrupt no. 65 (Unused) - ivINT_eFlexPWMB_RELOAD3  */
  JSR  Cpu_Interrupt66                 /* Interrupt no. 66 (Unused) - ivINT_eFlexPWMB_CAP3  */
  JSR  Cpu_Interrupt67                 /* Interrupt no. 67 (Unused) - ivINT_eFlexPWMB_CMP3  */
  JSR  Cpu_Interrupt68                 /* Interrupt no. 68 (Unused) - ivINT_eFlexPWMB_RELOAD2  */
  JSR  Cpu_Interrupt69                 /* Interrupt no. 69 (Unused) - ivINT_eFlexPWMB_CAP2  */
  JSR  Cpu_Interrupt70                 /* Interrupt no. 70 (Unused) - ivINT_eFlexPWMB_CMP2  */
  JSR  Cpu_Interrupt71                 /* Interrupt no. 71 (Unused) - ivINT_eFlexPWMB_RELOAD1  */
  JSR  Cpu_Interrupt72                 /* Interrupt no. 72 (Unused) - ivINT_eFlexPWMB_CAP1  */
  JSR  Cpu_Interrupt73                 /* Interrupt no. 73 (Unused) - ivINT_eFlexPWMB_CMP1  */
  JSR  Cpu_Interrupt74                 /* Interrupt no. 74 (Unused) - ivINT_eFlexPWMB_RELOAD0  */
  JSR  Cpu_Interrupt75                 /* Interrupt no. 75 (Unused) - ivINT_eFlexPWMB_CAP0  */
  JSR  Cpu_Interrupt76                 /* Interrupt no. 76 (Unused) - ivINT_eFlexPWMB_CMP0  */
  JSR  Cpu_Interrupt77                 /* Interrupt no. 77 (Unused) - ivINT_eFlexPWMA_FAULT  */
  JSR  Cpu_Interrupt78                 /* Interrupt no. 78 (Unused) - ivINT_eFlexPWMA_RERR  */
  JSR  Cpu_Interrupt79                 /* Interrupt no. 79 (Unused) - ivINT_eFlexPWMA_RELOAD3  */
  JSR  Cpu_Interrupt80                 /* Interrupt no. 80 (Unused) - ivINT_eFlexPWMA_CAP  */
  JSR  Cpu_Interrupt81                 /* Interrupt no. 81 (Unused) - ivINT_eFlexPWMA_CMP3  */
  JSR  Cpu_Interrupt82                 /* Interrupt no. 82 (Unused) - ivINT_eFlexPWMA_RELOAD2  */
  JSR  Cpu_Interrupt83                 /* Interrupt no. 83 (Unused) - ivINT_eFlexPWMA_CMP2  */
  JSR  Cpu_Interrupt84                 /* Interrupt no. 84 (Unused) - ivINT_eFlexPWMA_RELOAD1  */
  JSR  Cpu_Interrupt85                 /* Interrupt no. 85 (Unused) - ivINT_eFlexPWMA_CMP1  */
  JSR  Cpu_Interrupt86                 /* Interrupt no. 86 (Unused) - ivINT_eFlexPWMA_RELOAD0  */
  JSR  Cpu_Interrupt87                 /* Interrupt no. 87 (Unused) - ivINT_eFlexPWMA_CMP0  */
  JSR  Cpu_Interrupt88                 /* Interrupt no. 88 (Unused) - ivINT_FTFL_RDCOL  */
  JSR  Cpu_Interrupt89                 /* Interrupt no. 89 (Unused) - ivINT_FTFL_CC  */
  JSR  Cpu_Interrupt90                 /* Interrupt no. 90 (Unused) - ivINT_CMPD  */
  JSR  Cpu_Interrupt91                 /* Interrupt no. 91 (Unused) - ivINT_CMPC  */
  JSR  Cpu_Interrupt92                 /* Interrupt no. 92 (Unused) - ivINT_CMPB  */
  JSR  Cpu_Interrupt93                 /* Interrupt no. 93 (Unused) - ivINT_CMPA  */
  JSR  Cpu_Interrupt94                 /* Interrupt no. 94 (Unused) - ivINT_PIT1_ROLLOVR  */
  JSR  PIT_ISR                         /* Interrupt no. 95 (Used)   - ivINT_PIT0_ROLLOVR  */
  JSR  Cpu_Interrupt96                 /* Interrupt no. 96 (Unused) - ivINT_PDB1  */
  JSR  Cpu_Interrupt97                 /* Interrupt no. 97 (Unused) - ivINT_PDB0  */
  JSR  Cpu_Interrupt98                 /* Interrupt no. 98 (Unused) - ivINT_INDEX  */
  JSR  Cpu_Interrupt99                 /* Interrupt no. 99 (Unused) - ivINT_HOME_DOG  */
  JSR  Cpu_Interrupt100                /* Interrupt no. 100 (Unused) - ivINT_COMPARE  */
  JSR  Cpu_Interrupt101                /* Interrupt no. 101 (Unused) - ivINT_GPIOG  */
  JSR  Cpu_Interrupt102                /* Interrupt no. 102 (Unused) - ivINT_GPIOF  */
  JSR  Cpu_Interrupt103                /* Interrupt no. 103 (Unused) - ivINT_GPIOE  */
  JSR  Cpu_Interrupt104                /* Interrupt no. 104 (Unused) - ivINT_GPIOD  */
  JSR  Cpu_Interrupt105                /* Interrupt no. 105 (Unused) - ivINT_GPIOC  */
  JSR  Cpu_Interrupt106                /* Interrupt no. 106 (Unused) - ivINT_GPIOB  */
  JSR  Cpu_Interrupt107                /* Interrupt no. 107 (Unused) - ivINT_GPIOA  */
  JSR  Cpu_Interrupt108                /* Interrupt no. 108 (Unused) - ivINT_COP_INT  */
  JSR  Cpu_Interrupt109                /* Interrupt no. 109 (Unused) - ivINT_EWM_INT  */
  JSR  Cpu_Interrupt110                /* Interrupt no. 110 (Unused) - ivINT_SWILP  */
}
#pragma section interrupt_vectors end

#endif _lint

/* Disable MISRA rules for interurupt routines */
/*lint -esym(765,Cpu_Interrupt2) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt2). */
/*lint -esym(765,Cpu_Interrupt3) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt3). */
/*lint -esym(765,Cpu_Interrupt4) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt4). */
/*lint -esym(765,Cpu_Interrupt5) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt5). */
/*lint -esym(765,Cpu_Interrupt6) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt6). */
/*lint -esym(765,Cpu_Interrupt7) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt7). */
/*lint -esym(765,Cpu_Interrupt8) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt8). */
/*lint -esym(765,Cpu_Interrupt9) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt9). */
/*lint -esym(765,Cpu_Interrupt10) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt10). */
/*lint -esym(765,Cpu_Interrupt11) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt11). */
/*lint -esym(765,Cpu_Interrupt12) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt12). */
/*lint -esym(765,Cpu_Interrupt13) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt13). */
/*lint -esym(765,Cpu_Interrupt14) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt14). */
/*lint -esym(765,Cpu_Interrupt15) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt15). */
/*lint -esym(765,Cpu_Interrupt16) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt16). */
/*lint -esym(765,Cpu_Interrupt17) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt17). */
/*lint -esym(765,Cpu_Interrupt18) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt18). */
/*lint -esym(765,Cpu_Interrupt19) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt19). */
/*lint -esym(765,Cpu_Interrupt20) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt20). */
/*lint -esym(765,Cpu_Interrupt21) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt21). */
/*lint -esym(765,Cpu_Interrupt22) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt22). */
/*lint -esym(765,Cpu_Interrupt23) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt23). */
/*lint -esym(765,Cpu_Interrupt24) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt24). */
/*lint -esym(765,Cpu_Interrupt25) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt25). */
/*lint -esym(765,Cpu_Interrupt26) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt26). */
/*lint -esym(765,Cpu_Interrupt27) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt27). */
/*lint -esym(765,Cap1_Interrupt) Disable MISRA rule (8.10) checking for symbols (Cap1_Interrupt). */
/*lint -esym(765,Cpu_Interrupt29) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt29). */
/*lint -esym(765,Cpu_Interrupt30) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt30). */
/*lint -esym(765,Cpu_Interrupt31) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt31). */
/*lint -esym(765,Cpu_Interrupt32) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt32). */
/*lint -esym(765,Cpu_Interrupt33) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt33). */
/*lint -esym(765,Cpu_Interrupt34) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt34). */
/*lint -esym(765,Cpu_Interrupt35) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt35). */
/*lint -esym(765,Cpu_Interrupt36) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt36). */
/*lint -esym(765,Cpu_Interrupt37) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt37). */
/*lint -esym(765,Cpu_Interrupt38) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt38). */
/*lint -esym(765,Cpu_Interrupt39) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt39). */
/*lint -esym(765,Cpu_Interrupt40) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt40). */
/*lint -esym(765,Cpu_Interrupt41) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt41). */
/*lint -esym(765,Cpu_Interrupt42) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt42). */
/*lint -esym(765,Cpu_Interrupt43) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt43). */
/*lint -esym(765,Cpu_Interrupt44) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt44). */
/*lint -esym(765,Cpu_Interrupt45) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt45). */
/*lint -esym(765,Cpu_Interrupt46) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt46). */
/*lint -esym(765,Cpu_Interrupt47) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt47). */
/*lint -esym(765,Cpu_Interrupt48) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt48). */
/*lint -esym(765,Cpu_Interrupt49) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt49). */
/*lint -esym(765,Cpu_Interrupt50) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt50). */
/*lint -esym(765,Cpu_Interrupt51) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt51). */
/*lint -esym(765,Cpu_Interrupt52) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt52). */
/*lint -esym(765,Cpu_Interrupt53) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt53). */
/*lint -esym(765,Cpu_Interrupt54) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt54). */
/*lint -esym(765,Cpu_Interrupt55) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt55). */
/*lint -esym(765,Cpu_Interrupt56) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt56). */
/*lint -esym(765,Cpu_Interrupt57) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt57). */
/*lint -esym(765,Cpu_Interrupt58) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt58). */
/*lint -esym(765,Cpu_Interrupt59) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt59). */
/*lint -esym(765,Cpu_Interrupt60) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt60). */
/*lint -esym(765,Cpu_Interrupt61) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt61). */
/*lint -esym(765,Cpu_Interrupt62) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt62). */
/*lint -esym(765,Cpu_Interrupt63) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt63). */
/*lint -esym(765,Cpu_Interrupt64) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt64). */
/*lint -esym(765,Cpu_Interrupt65) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt65). */
/*lint -esym(765,Cpu_Interrupt66) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt66). */
/*lint -esym(765,Cpu_Interrupt67) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt67). */
/*lint -esym(765,Cpu_Interrupt68) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt68). */
/*lint -esym(765,Cpu_Interrupt69) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt69). */
/*lint -esym(765,Cpu_Interrupt70) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt70). */
/*lint -esym(765,Cpu_Interrupt71) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt71). */
/*lint -esym(765,Cpu_Interrupt72) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt72). */
/*lint -esym(765,Cpu_Interrupt73) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt73). */
/*lint -esym(765,Cpu_Interrupt74) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt74). */
/*lint -esym(765,Cpu_Interrupt75) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt75). */
/*lint -esym(765,Cpu_Interrupt76) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt76). */
/*lint -esym(765,Cpu_Interrupt77) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt77). */
/*lint -esym(765,Cpu_Interrupt78) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt78). */
/*lint -esym(765,Cpu_Interrupt79) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt79). */
/*lint -esym(765,Cpu_Interrupt80) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt80). */
/*lint -esym(765,Cpu_Interrupt81) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt81). */
/*lint -esym(765,Cpu_Interrupt82) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt82). */
/*lint -esym(765,Cpu_Interrupt83) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt83). */
/*lint -esym(765,Cpu_Interrupt84) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt84). */
/*lint -esym(765,Cpu_Interrupt85) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt85). */
/*lint -esym(765,Cpu_Interrupt86) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt86). */
/*lint -esym(765,Cpu_Interrupt87) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt87). */
/*lint -esym(765,Cpu_Interrupt88) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt88). */
/*lint -esym(765,Cpu_Interrupt89) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt89). */
/*lint -esym(765,Cpu_Interrupt90) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt90). */
/*lint -esym(765,Cpu_Interrupt91) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt91). */
/*lint -esym(765,Cpu_Interrupt92) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt92). */
/*lint -esym(765,Cpu_Interrupt93) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt93). */
/*lint -esym(765,Cpu_Interrupt94) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt94). */
/*lint -esym(765,PIT_ISR) Disable MISRA rule (8.10) checking for symbols (PIT_ISR). */
/*lint -esym(765,Cpu_Interrupt96) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt96). */
/*lint -esym(765,Cpu_Interrupt97) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt97). */
/*lint -esym(765,Cpu_Interrupt98) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt98). */
/*lint -esym(765,Cpu_Interrupt99) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt99). */
/*lint -esym(765,Cpu_Interrupt100) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt100). */
/*lint -esym(765,Cpu_Interrupt101) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt101). */
/*lint -esym(765,Cpu_Interrupt102) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt102). */
/*lint -esym(765,Cpu_Interrupt103) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt103). */
/*lint -esym(765,Cpu_Interrupt104) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt104). */
/*lint -esym(765,Cpu_Interrupt105) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt105). */
/*lint -esym(765,Cpu_Interrupt106) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt106). */
/*lint -esym(765,Cpu_Interrupt107) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt107). */
/*lint -esym(765,Cpu_Interrupt108) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt108). */
/*lint -esym(765,Cpu_Interrupt109) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt109). */
/*lint -esym(765,Cpu_Interrupt110) Disable MISRA rule (8.10) checking for symbols (Cpu_Interrupt110). */

/*
** ###################################################################
**
**     This file was created by Processor Expert 5.3 [05.01]
**     for the Freescale 56800 series of microcontrollers.
**
** ###################################################################
*/
