<?xml version="1.0" encoding="UTF-8"?>
<PE_PROJECT_SETTINGS_DOCUMENTATION>
  <PE_product_version v="version 5.3 for Freescale Microcontrollers" />
  <PE_core_version v="Processor Expert Version 0501" />
  <CPU_Bean name="Cpu" type="MC56F84789VLL">
    <Enabled v="Y" />
    <Properties>
      <Component_name v="Cpu" />
      <CPU_type v="MC56F84789VLL" />
      <list name="Clock settings (included)" v="1">
        <group name="Clock settings">
          <group name="Internal oscillator">
            <boolgroup name="Internal 32kHz relaxation oscillator (ROSC_32K)" v="Disabled" />
            <boolgroup name="Internal 8MHz relaxation oscillator (ROSC_8M)" v="Enabled">
              <Fast_internal_reference_clock__MHz_ v="8" />
              <boolgroup name="Initialize frequency trim" v="yes">
                <Frequency_trim_value_address v="58412" />
              </boolgroup>
              <boolgroup name="Initialize temperature trim" v="no" />
            </boolgroup>
          </group>
          <boolgroup name="External reference clock" v="Disabled" />
          <group name="Clock protection">
            <Frequency v="Off" />
            <Oscillator v="Off" />
            <Phase_locked_loop v="Off" />
          </group>
        </group>
      </list>
      <list name="Common settings (included)" v="1">
        <group name="Common settings">
          <Initialization_priority v="minimal priority" />
          <Watchdog v="No initialization" />
          <Saturation_mode v="Disabled" />
        </group>
      </list>
      <list name="Initialize shadow registers (included)" v="1">
        <boolgroup name="Initialize shadow registers" v="yes">
          <R0 v="0" />
          <R1 v="0" />
          <R2 v="0" />
          <R3 v="0" />
          <R4 v="0" />
          <R5 v="0" />
          <N v="0" />
          <N3 v="65535" />
          <M01 v="65535" />
        </boolgroup>
      </list>
      <list name="Initialize unused I/O pins (included)" v="1">
        <enumgroup name="Initialize unused I/O pins" v="No initialization">
          <Pull_resistor v="No initialization" />
          <Open_drain v="No initialization" />
          <Output_value v="no initialization" />
          <Include_Reset_pin v="no" />
          <Include_JTAG_pins v="no" />
        </enumgroup>
      </list>
      <group name="Internal peripherals">
        <list name="Shared Reset settings" v="1">
          <boolgroup name="Reset pin" v="Enabled">
            <Reset_Pin v="GPIOD4/RESETB" />
            <Reset_Pin_signal v="" />
          </boolgroup>
        </list>
        <list name="Flash memory organization (included)" v="1">
          <group name="Flash memory organization">
            <list name="Shared FLASH settings" v="1">
              <group name="FlexNVM settings">
                <FlexNVM_size v="16 kW" />
                <D_flash_size v="16 kW" />
                <EEE_data_size v="0 words" />
                <boolgroup name="FlexRAM" v="Enabled">
                  <Start v="122880" />
                  <Size v="1024" />
                </boolgroup>
              </group>
            </list>
            <list name="Flash blocks" v="2">
              <group name="Flash block 0">
                <Address v="0" />
                <Size v="131072" />
                <Write_unit_size v="2" />
                <Erase_unit_size v="1024" />
                <Protection_unit_size v="4096" />
              </group>
              <group name="Flash block 1">
                <Address v="32768" />
                <Size v="16384" />
                <Write_unit_size v="2" />
                <Erase_unit_size v="512" />
                <Protection_unit_size v="2048" />
              </group>
            </list>
          </group>
        </list>
        <list name="Flash config settings (included)" v="1">
          <boolgroup name="Flash configuration field" v="Disabled" />
        </list>
        <list name="Memory resource protection (include)" v="1">
          <enumgroup name="Memory resource protection" v="Disabled">
            <EmptySection_DummyValue />
          </enumgroup>
        </list>
        <group name="Peripheral clock rates">
          <QSCI0_clock_rate v="Auto select" />
          <QSCI1_clock_rate v="QSCI1_2x_System_clock" />
          <QSCI2_clock_rate v="Auto select" />
        </group>
        <list name="SIM module (included)" v="1">
          <group name="System integration module">
            <group name="Common CPU settings">
              <WAIT_disable_mode v="Enabled" />
              <STOP_disable_mode v="Enabled" />
              <DMA_disable_mode v="All modes" />
              <OnCE_clock_to_core v="Enabled when core TAP is enabled" />
              <Reset_filter v="Disabled" />
              <Select_Master_PIT v="Master 0 and slave 1" />
            </group>
            <group name="Power controls">
              <Regulator_1_2_V_standby v="normal mode" />
              <Regulator_2_7_V_powerdown v="normal mode" />
              <Regulator_2_7_V_standby v="normal mode" />
              <Large_regulator_standby v="normal mode" />
            </group>
            <group name="Clock output selectors">
              <CLKOUT_divide_factor v="Divide by 1" />
              <CLKOUT0_select v="System clock" />
              <boolgroup name="CLKOUT0" v="Disabled" />
              <CLKOUT1_select v="System clock" />
              <boolgroup name="CLKOUT1" v="Disabled" />
            </group>
            <group name="Clock gating control in stop mode">
              <GPIOA_peripheral_clock_in_stop_mode v="Disabled" />
              <GPIOB_peripheral_clock_in_stop_mode v="Disabled" />
              <GPIOC_peripheral_clock_in_stop_mode v="Disabled" />
              <GPIOD_peripheral_clock_in_stop_mode v="Disabled" />
              <GPIOE_peripheral_clock_in_stop_mode v="Disabled" />
              <GPIOF_peripheral_clock_in_stop_mode v="Disabled" />
              <GPIOG_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_A_Channel_0_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_A_Channel_1_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_A_Channel_2_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_A_Channel_3_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_B_Channel_0_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_B_Channel_1_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_B_Channel_2_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_B_Channel_3_peripheral_clock_in_stop_mode v="Disabled" />
              <CAN_peripheral_clock_in_stop_mode v="Disabled" />
              <I2C0_peripheral_clock_in_stop_mode v="Disabled" />
              <I2C1_peripheral_clock_in_stop_mode v="Disabled" />
              <QSPI0_peripheral_clock_in_stop_mode v="Disabled" />
              <QSPI1_peripheral_clock_in_stop_mode v="Disabled" />
              <QSPI2_peripheral_clock_in_stop_mode v="Disabled" />
              <QSCI0_peripheral_clock_in_stop_mode v="Disabled" />
              <QSCI1_peripheral_clock_in_stop_mode v="Disabled" />
              <QSCI2_peripheral_clock_in_stop_mode v="Disabled" />
              <DAC_peripheral_clock_in_stop_mode v="Disabled" />
              <PDB0_peripheral_clock_in_stop_mode v="Disabled" />
              <PDB1_peripheral_clock_in_stop_mode v="Disabled" />
              <PIT0_peripheral_clock_in_stop_mode v="Disabled" />
              <PIT1_peripheral_clock_in_stop_mode v="Disabled" />
              <ENC_peripheral_clock_in_stop_mode v="Disabled" />
              <CRC_peripheral_clock_in_stop_mode v="Disabled" />
              <ADC16_peripheral_clock_in_stop_mode v="Disabled" />
              <ADC12_peripheral_clock_in_stop_mode v="Disabled" />
              <CMPA_peripheral_clock_in_stop_mode v="Disabled" />
              <CMPB_peripheral_clock_in_stop_mode v="Disabled" />
              <CMPC_peripheral_clock_in_stop_mode v="Disabled" />
              <CMPD_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_A_Channel_0_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_A_Channel_1_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_A_Channel_2_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_A_Channel_3_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_B_Channel_0_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_B_Channel_1_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_B_Channel_2_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_B_Channel_3_peripheral_clock_in_stop_mode v="Disabled" />
            </group>
            <group name="Clock gating control">
              <GPIOA_peripheral_clock v="Enabled" />
              <GPIOB_peripheral_clock v="Enabled" />
              <GPIOC_peripheral_clock v="Enabled" />
              <GPIOD_peripheral_clock v="Enabled" />
              <GPIOE_peripheral_clock v="Enabled" />
              <GPIOF_peripheral_clock v="Enabled" />
              <GPIOG_peripheral_clock v="Enabled" />
              <Timer_A_Channel_0_peripheral_clock v="Disabled" />
              <Timer_A_Channel_1_peripheral_clock v="Disabled" />
              <Timer_A_Channel_2_peripheral_clock v="Disabled" />
              <Timer_A_Channel_3_peripheral_clock v="Disabled" />
              <Timer_B_Channel_0_peripheral_clock v="Enabled" />
              <Timer_B_Channel_1_peripheral_clock v="Disabled" />
              <Timer_B_Channel_2_peripheral_clock v="Disabled" />
              <Timer_B_Channel_3_peripheral_clock v="Disabled" />
              <CAN_peripheral_clock v="Disabled" />
              <I2C0_peripheral_clock v="Disabled" />
              <I2C1_peripheral_clock v="Disabled" />
              <QSPI0_peripheral_clock v="Disabled" />
              <QSPI1_peripheral_clock v="Disabled" />
              <QSPI2_peripheral_clock v="Disabled" />
              <QSCI0_peripheral_clock v="Disabled" />
              <QSCI1_peripheral_clock v="Enabled" />
              <QSCI2_peripheral_clock v="Disabled" />
              <DAC_peripheral_clock v="Disabled" />
              <PDB0_peripheral_clock v="Disabled" />
              <PDB1_peripheral_clock v="Disabled" />
              <PIT0_peripheral_clock v="Disabled" />
              <PIT1_peripheral_clock v="Disabled" />
              <ENC_peripheral_clock v="Disabled" />
              <CRC_peripheral_clock v="Disabled" />
              <ADC16_peripheral_clock v="Disabled" />
              <ADC12_peripheral_clock v="Enabled" />
              <CMPA_peripheral_clock v="Disabled" />
              <CMPB_peripheral_clock v="Disabled" />
              <CMPC_peripheral_clock v="Disabled" />
              <CMPD_peripheral_clock v="Disabled" />
              <PWM_A_Channel_0_peripheral_clock v="Disabled" />
              <PWM_A_Channel_1_peripheral_clock v="Disabled" />
              <PWM_A_Channel_2_peripheral_clock v="Disabled" />
              <PWM_A_Channel_3_peripheral_clock v="Disabled" />
              <PWM_B_Channel_0_peripheral_clock v="Disabled" />
              <PWM_B_Channel_1_peripheral_clock v="Disabled" />
              <PWM_B_Channel_2_peripheral_clock v="Disabled" />
              <PWM_B_Channel_3_peripheral_clock v="Disabled" />
            </group>
            <group name="Peripheral protection">
              <Power_Mode_Control_Write v="Off" />
              <GPIO_Port_D v="Off" />
              <Peripheral_Clock_Enable v="Off" />
              <GPIO_and_Internal_Peripheral_Select v="Off" />
            </group>
          </group>
        </list>
        <list name="MCM module (included)" v="1">
          <group name="Miscellaneous control module">
            <Program_RAM_Base_Address v="0" />
            <Flash_Base_Address v="0" />
            <Register_lock v="Disabled" />
            <AXBS_crossbar_switch_arbitration_scheme v="Fixed priority" />
            <Core_instruction_buffer v="Enabled" />
            <Core_new_shadow_region v="Enabled" />
            <Core_reverse_carry v="Enabled" />
            <_56800EX_instructions v="Enabled" />
            <group name="SoC control fields">
              <SoC_output_0_signal v="Disabled" />
              <SoC_output_1_signal v="Disabled" />
              <SoC_output_2_signal v="Disabled" />
              <SoC_output_3_signal v="Disabled" />
              <SoC_output_4_signal v="Disabled" />
              <SoC_output_5_signal v="Disabled" />
              <SoC_output_6_signal v="Disabled" />
              <SoC_output_7_signal v="Disabled" />
              <SoC_output_8_signal v="Disabled" />
              <SoC_output_9_signal v="Disabled" />
              <SoC_output_10_signal v="Disabled" />
              <SoC_output_11_signal v="Disabled" />
              <SoC_output_12_signal v="Disabled" />
              <SoC_output_13_signal v="Disabled" />
              <SoC_output_14_signal v="Disabled" />
              <SoC_output_15_signal v="Disabled" />
            </group>
          </group>
        </list>
        <list name="PMC module (included)" v="1">
          <boolgroup name="Power management controller" v="Disabled" />
        </list>
        <list name="FMC module (included)" v="1">
          <boolgroup name="Flexible memory controller" v="Disabled" />
        </list>
        <list name="GPIOA module (included)" v="1">
          <group name="GPIOA">
            <group name="GPIOA_Low">
              <Drive_strength_for_GPIOA0 v="Low" />
              <Slew_rate_for_GPIOA0 v="Fast" />
              <Drive_strength_for_GPIOA1 v="Low" />
              <Slew_rate_for_GPIOA1 v="Fast" />
              <Drive_strength_for_GPIOA2 v="Low" />
              <Slew_rate_for_GPIOA2 v="Fast" />
              <Drive_strength_for_GPIOA3 v="Low" />
              <Slew_rate_for_GPIOA3 v="Fast" />
              <Drive_strength_for_GPIOA4 v="Low" />
              <Slew_rate_for_GPIOA4 v="Fast" />
              <Drive_strength_for_GPIOA5 v="Low" />
              <Slew_rate_for_GPIOA5 v="Fast" />
              <Drive_strength_for_GPIOA6 v="Low" />
              <Slew_rate_for_GPIOA6 v="Fast" />
              <Drive_strength_for_GPIOA7 v="Low" />
              <Slew_rate_for_GPIOA7 v="Fast" />
            </group>
            <group name="GPIOA_High">
              <Drive_strength_for_GPIOA8 v="Low" />
              <Slew_rate_for_GPIOA8 v="Fast" />
              <Drive_strength_for_GPIOA9 v="Low" />
              <Slew_rate_for_GPIOA9 v="Fast" />
              <Drive_strength_for_GPIOA10 v="Low" />
              <Slew_rate_for_GPIOA10 v="Fast" />
              <Drive_strength_for_GPIOA11 v="Low" />
              <Slew_rate_for_GPIOA11 v="Fast" />
            </group>
          </group>
        </list>
        <list name="GPIOB module (included)" v="1">
          <group name="GPIOB">
            <group name="GPIOB_Low">
              <Drive_strength_for_GPIOB0 v="Low" />
              <Slew_rate_for_GPIOB0 v="Fast" />
              <Drive_strength_for_GPIOB1 v="Low" />
              <Slew_rate_for_GPIOB1 v="Fast" />
              <Drive_strength_for_GPIOB2 v="Low" />
              <Slew_rate_for_GPIOB2 v="Fast" />
              <Drive_strength_for_GPIOB3 v="Low" />
              <Slew_rate_for_GPIOB3 v="Fast" />
              <Drive_strength_for_GPIOB4 v="Low" />
              <Slew_rate_for_GPIOB4 v="Fast" />
              <Drive_strength_for_GPIOB5 v="Low" />
              <Slew_rate_for_GPIOB5 v="Fast" />
              <Drive_strength_for_GPIOB6 v="Low" />
              <Slew_rate_for_GPIOB6 v="Fast" />
              <Drive_strength_for_GPIOB7 v="Low" />
              <Slew_rate_for_GPIOB7 v="Fast" />
            </group>
            <group name="GPIOB_High">
              <Drive_strength_for_GPIOB8 v="Low" />
              <Slew_rate_for_GPIOB8 v="Fast" />
              <Drive_strength_for_GPIOB9 v="Low" />
              <Slew_rate_for_GPIOB9 v="Fast" />
              <Drive_strength_for_GPIOB10 v="Low" />
              <Slew_rate_for_GPIOB10 v="Fast" />
              <Drive_strength_for_GPIOB11 v="Low" />
              <Slew_rate_for_GPIOB11 v="Fast" />
            </group>
          </group>
        </list>
        <list name="GPIOC module (included)" v="1">
          <group name="GPIOC">
            <group name="GPIOC_Low">
              <Drive_strength_for_GPIOC0 v="Low" />
              <Slew_rate_for_GPIOC0 v="Fast" />
              <Drive_strength_for_GPIOC1 v="Low" />
              <Slew_rate_for_GPIOC1 v="Fast" />
              <Drive_strength_for_GPIOC2 v="Low" />
              <Slew_rate_for_GPIOC2 v="Fast" />
              <Drive_strength_for_GPIOC3 v="Low" />
              <Slew_rate_for_GPIOC3 v="Fast" />
              <Drive_strength_for_GPIOC4 v="Low" />
              <Slew_rate_for_GPIOC4 v="Fast" />
              <Drive_strength_for_GPIOC5 v="Low" />
              <Slew_rate_for_GPIOC5 v="Fast" />
              <Drive_strength_for_GPIOC6 v="Low" />
              <Slew_rate_for_GPIOC6 v="Fast" />
              <Drive_strength_for_GPIOC7 v="Low" />
              <Slew_rate_for_GPIOC7 v="Fast" />
            </group>
            <group name="GPIOC_High">
              <Drive_strength_for_GPIOC8 v="Low" />
              <Slew_rate_for_GPIOC8 v="Fast" />
              <Drive_strength_for_GPIOC9 v="Low" />
              <Slew_rate_for_GPIOC9 v="Fast" />
              <Drive_strength_for_GPIOC10 v="Low" />
              <Slew_rate_for_GPIOC10 v="Fast" />
              <Drive_strength_for_GPIOC11 v="Low" />
              <Slew_rate_for_GPIOC11 v="Fast" />
              <Drive_strength_for_GPIOC12 v="Low" />
              <Slew_rate_for_GPIOC12 v="Fast" />
              <Drive_strength_for_GPIOC13 v="Low" />
              <Slew_rate_for_GPIOC13 v="Fast" />
              <Drive_strength_for_GPIOC14 v="Low" />
              <Slew_rate_for_GPIOC14 v="Fast" />
              <Drive_strength_for_GPIOC15 v="Low" />
              <Slew_rate_for_GPIOC15 v="Fast" />
            </group>
          </group>
        </list>
        <list name="GPIOD module (included)" v="1">
          <group name="GPIOD">
            <Drive_strength_for_GPIOD0 v="Low" />
            <Slew_rate_for_GPIOD0 v="Fast" />
            <Drive_strength_for_GPIOD1 v="Low" />
            <Slew_rate_for_GPIOD1 v="Fast" />
            <Drive_strength_for_GPIOD2 v="Low" />
            <Slew_rate_for_GPIOD2 v="Fast" />
            <Drive_strength_for_GPIOD3 v="Low" />
            <Slew_rate_for_GPIOD3 v="Fast" />
            <Drive_strength_for_GPIOD4 v="Low" />
            <Slew_rate_for_GPIOD4 v="Fast" />
            <Drive_strength_for_GPIOD5 v="Low" />
            <Slew_rate_for_GPIOD5 v="Fast" />
            <Drive_strength_for_GPIOD6 v="Low" />
            <Slew_rate_for_GPIOD6 v="Fast" />
            <Drive_strength_for_GPIOD7 v="Low" />
            <Slew_rate_for_GPIOD7 v="Fast" />
          </group>
        </list>
        <list name="GPIOE module (included)" v="1">
          <group name="GPIOE">
            <group name="GPIOE_Low">
              <Drive_strength_for_GPIOE0 v="Low" />
              <Slew_rate_for_GPIOE0 v="Fast" />
              <Drive_strength_for_GPIOE1 v="Low" />
              <Slew_rate_for_GPIOE1 v="Fast" />
              <Drive_strength_for_GPIOE2 v="Low" />
              <Slew_rate_for_GPIOE2 v="Fast" />
              <Drive_strength_for_GPIOE3 v="Low" />
              <Slew_rate_for_GPIOE3 v="Fast" />
              <Drive_strength_for_GPIOE4 v="Low" />
              <Slew_rate_for_GPIOE4 v="Fast" />
              <Drive_strength_for_GPIOE5 v="Low" />
              <Slew_rate_for_GPIOE5 v="Fast" />
              <Drive_strength_for_GPIOE6 v="Low" />
              <Slew_rate_for_GPIOE6 v="Fast" />
              <Drive_strength_for_GPIOE7 v="Low" />
              <Slew_rate_for_GPIOE7 v="Fast" />
            </group>
            <group name="GPIOE_High">
              <Drive_strength_for_GPIOE8 v="Low" />
              <Slew_rate_for_GPIOE8 v="Fast" />
              <Drive_strength_for_GPIOE9 v="Low" />
              <Slew_rate_for_GPIOE9 v="Fast" />
            </group>
          </group>
        </list>
        <list name="GPIOF module (included)" v="1">
          <group name="GPIOF">
            <group name="GPIOF_Low">
              <Drive_strength_for_GPIOF0 v="Low" />
              <Slew_rate_for_GPIOF0 v="Fast" />
              <Drive_strength_for_GPIOF1 v="Low" />
              <Slew_rate_for_GPIOF1 v="Fast" />
              <Drive_strength_for_GPIOF2 v="Low" />
              <Slew_rate_for_GPIOF2 v="Fast" />
              <Drive_strength_for_GPIOF3 v="Low" />
              <Slew_rate_for_GPIOF3 v="Fast" />
              <Drive_strength_for_GPIOF4 v="Low" />
              <Slew_rate_for_GPIOF4 v="Fast" />
              <Drive_strength_for_GPIOF5 v="Low" />
              <Slew_rate_for_GPIOF5 v="Fast" />
              <Drive_strength_for_GPIOF6 v="Low" />
              <Slew_rate_for_GPIOF6 v="Fast" />
              <Drive_strength_for_GPIOF7 v="Low" />
              <Slew_rate_for_GPIOF7 v="Fast" />
            </group>
            <group name="GPIOF_High">
              <Drive_strength_for_GPIOF8 v="Low" />
              <Slew_rate_for_GPIOF8 v="Fast" />
              <Drive_strength_for_GPIOF9 v="Low" />
              <Slew_rate_for_GPIOF9 v="Fast" />
              <Drive_strength_for_GPIOF10 v="Low" />
              <Slew_rate_for_GPIOF10 v="Fast" />
              <Drive_strength_for_GPIOF11 v="Low" />
              <Slew_rate_for_GPIOF11 v="Fast" />
              <Drive_strength_for_GPIOF12 v="Low" />
              <Slew_rate_for_GPIOF12 v="Fast" />
              <Drive_strength_for_GPIOF13 v="Low" />
              <Slew_rate_for_GPIOF13 v="Fast" />
              <Drive_strength_for_GPIOF14 v="Low" />
              <Slew_rate_for_GPIOF14 v="Fast" />
              <Drive_strength_for_GPIOF15 v="Low" />
              <Slew_rate_for_GPIOF15 v="Fast" />
            </group>
          </group>
        </list>
        <list name="GPIOG module (included)" v="1">
          <group name="GPIOG">
            <group name="GPIOG_Low">
              <Drive_strength_for_GPIOG0 v="Low" />
              <Slew_rate_for_GPIOG0 v="Fast" />
              <Drive_strength_for_GPIOG1 v="Low" />
              <Slew_rate_for_GPIOG1 v="Fast" />
              <Drive_strength_for_GPIOG2 v="Low" />
              <Slew_rate_for_GPIOG2 v="Fast" />
              <Drive_strength_for_GPIOG3 v="Low" />
              <Slew_rate_for_GPIOG3 v="Fast" />
              <Drive_strength_for_GPIOG4 v="Low" />
              <Slew_rate_for_GPIOG4 v="Fast" />
              <Drive_strength_for_GPIOG5 v="Low" />
              <Slew_rate_for_GPIOG5 v="Fast" />
              <Drive_strength_for_GPIOG6 v="Low" />
              <Slew_rate_for_GPIOG6 v="Fast" />
              <Drive_strength_for_GPIOG7 v="Low" />
              <Slew_rate_for_GPIOG7 v="Fast" />
            </group>
            <group name="GPIOG_High">
              <Drive_strength_for_GPIOG8 v="Low" />
              <Slew_rate_for_GPIOG8 v="Fast" />
              <Drive_strength_for_GPIOG9 v="Low" />
              <Slew_rate_for_GPIOG9 v="Fast" />
              <Drive_strength_for_GPIOG10 v="Low" />
              <Slew_rate_for_GPIOG10 v="Fast" />
              <Drive_strength_for_GPIOG11 v="Low" />
              <Slew_rate_for_GPIOG11 v="Fast" />
            </group>
          </group>
        </list>
      </group>
      <group name="CPU interrupts">
        <boolgroup name="Interrupt SW0" v="Disabled" />
        <boolgroup name="Interrupt SW1" v="Disabled" />
        <boolgroup name="Interrupt SW2" v="Disabled" />
        <boolgroup name="Interrupt SW3" v="Disabled" />
        <boolgroup name="Interrupt LP" v="Disabled" />
        <boolgroup name="Interrupt PLL" v="Disabled" />
        <boolgroup name="Interrupt LVI" v="Disabled" />
        <boolgroup name="Interrupt Illegal Instruction" v="Disabled" />
        <boolgroup name="Interrupt Misalign Access" v="Disabled" />
        <boolgroup name="Interrupt HW Stack Overflow" v="Disabled" />
        <list name="MCM module (included)" v="1">
          <boolgroup name="Interrupt Core Fault" v="Disabled" />
        </list>
      </group>
      <list name="Enabled speed modes (included)" v="1">
        <group name="Enabled speed modes">
          <boolgroup name="High speed mode" v="Enabled">
            <Input_clock_source_ v="Internal oscillator 8MHz" />
            <Clock_output_divider__Postscaler_ v="Auto select" />
            <System_clock__IP_Bus___MHz_ v="100" />
            <boolgroup name="PLL clock" v="Enabled">
              <PLL_multiplier v="Auto select" />
              <PLL_clock_frequency v="400" />
              <Enable_PLL_after_reset v="yes" />
            </boolgroup>
          </boolgroup>
          <boolgroup name="Low speed mode" v="Disabled" />
          <boolgroup name="Slow speed mode" v="Disabled" />
        </group>
      </list>
    </Properties>
    <Methods>
      <list name="CPUCond0" v="1">
        <SetHighSpeed v="don&amp;apos;t generate code" />
        <SetLowSpeed v="don&amp;apos;t generate code" />
        <SetSlowSpeed v="don&amp;apos;t generate code" />
        <GetSpeedMode v="don&amp;apos;t generate code" />
        <EnableInt v="generate code" />
        <DisableInt v="generate code" />
        <GetResetSource v="don&amp;apos;t generate code" />
        <SetWaitMode v="generate code" />
        <SetStopMode v="generate code" />
        <GetBusFreqHz v="don&amp;apos;t generate code" />
        <OpenBackDoor v="don&amp;apos;t generate code" />
        <SetFlexRAMFunction v="don&amp;apos;t generate code" />
        <SetFlexNVMPartition v="don&amp;apos;t generate code" />
        <InitShadowRegs v="don&amp;apos;t generate code" />
        <Delay100US v="don&amp;apos;t generate code" />
        <EnablePLL v="don&amp;apos;t generate code" />
      </list>
    </Methods>
    <Events>
      <Event_module_name v="Events" />
      <list name="CPUCond" v="1">
        <event name="OnReset" v="don&amp;apos;t generate code" />
        <event name="OnSwINT0" v="don&amp;apos;t generate code" />
        <event name="OnSwINT1" v="don&amp;apos;t generate code" />
        <event name="OnSwINT2" v="don&amp;apos;t generate code" />
        <event name="OnSwINT3" v="don&amp;apos;t generate code" />
        <event name="OnSwINTLP" v="don&amp;apos;t generate code" />
        <event name="OnPLLError" v="don&amp;apos;t generate code" />
        <event name="OnIllegalOpcode" v="don&amp;apos;t generate code" />
        <event name="OnMisalignData" v="don&amp;apos;t generate code" />
        <event name="OnHWStackError" v="don&amp;apos;t generate code" />
        <event name="OnLVI22" v="don&amp;apos;t generate code" />
        <event name="OnLVI27" v="don&amp;apos;t generate code" />
        <event name="OnCoreFault" v="don&amp;apos;t generate code" />
      </list>
    </Events>
    <Compiler v="CodeWarrior DSP C Compiler" />
    <CompilerProperties>
      <Compiler v="CodeWarrior DSP C Compiler" />
      <PESL_support v="yes" />
      <Unhandled_interrupts v="One handler for all" />
      <group name="User initialization">
        <User_data_declarations>
          <StrgList></StrgList>
        </User_data_declarations>
        <User_code_before_PE_initialization>
          <StrgList></StrgList>
        </User_code_before_PE_initialization>
        <User_code_after_PE_initialization>
          <StrgList></StrgList>
        </User_code_after_PE_initialization>
      </group>
      <boolgroup name="Generate debugger files" v="yes">
        <Generate_mem_file v="yes" />
      </boolgroup>
      <boolgroup name="Generate linker file" v="yes">
        <Constants_in_xROM v="no" />
        <xROM_xRAM_mode v="no" />
        <pROM_xRAM_mode v="no" />
        <Stack_size v="512" />
        <Heap_size v="256" />
        <Set_memory_segments_to_default v="Click to set default &amp;gt;" />
        <Default_memory_for_interrupts v="INTERNAL FLASH" />
        <Default_memory_for_code v="INTERNAL FLASH" />
        <Default_memory_for_data v="INTERNAL RAM" />
        <list name="ROM/RAM Areas" v="4">
          <group name="MemoryArea0">
            <boolgroup name="ROM/RAM Area" v="Enabled">
              <Name v=".p_Interrupts" />
              <Address v="0" />
              <Size v="222" />
              <Qualifier v="RWX" />
            </boolgroup>
          </group>
          <group name="MemoryArea1">
            <boolgroup name="ROM/RAM Area" v="Enabled">
              <Name v=".p_Code" />
              <Address v="520" />
              <Size v="130552" />
              <Qualifier v="RWX" />
            </boolgroup>
          </group>
          <group name="MemoryArea2">
            <boolgroup name="ROM/RAM Area" v="Enabled">
              <Name v=".x_Data" />
              <Address v="1" />
              <Size v="16383" />
              <Qualifier v="RW" />
            </boolgroup>
          </group>
          <group name="MemoryArea3">
            <boolgroup name="ROM/RAM Area" v="Enabled">
              <Name v=".p_reserved_FCF" />
              <Address v="512" />
              <Size v="8" />
              <Qualifier v="RWX" />
            </boolgroup>
          </group>
        </list>
      </boolgroup>
      <list name="System paths " v="0">
        <EmptySection_DummyValue />
      </list>
      <list name="User paths " v="0">
        <EmptySection_DummyValue />
      </list>
      <list name="Libraries" v="0">
        <EmptySection_DummyValue />
      </list>
      <list name="User directories" v="0">
        <EmptySection_DummyValue />
      </list>
    </CompilerProperties>
  </CPU_Bean>
  <CPU_Bean name="Cpu" type="MC56F84789VLL">
    <Enabled v="N" />
    <Properties>
      <Component_name v="Cpu" />
      <CPU_type v="MC56F84789VLL" />
      <list name="Clock settings (included)" v="1">
        <group name="Clock settings">
          <group name="Internal oscillator">
            <boolgroup name="Internal 32kHz relaxation oscillator (ROSC_32K)" v="Disabled" />
            <boolgroup name="Internal 8MHz relaxation oscillator (ROSC_8M)" v="Enabled">
              <Fast_internal_reference_clock__MHz_ v="8" />
              <boolgroup name="Initialize frequency trim" v="no" />
              <boolgroup name="Initialize temperature trim" v="no" />
            </boolgroup>
          </group>
          <boolgroup name="External reference clock" v="Disabled" />
          <group name="Clock protection">
            <Frequency v="Off" />
            <Oscillator v="Off" />
            <Phase_locked_loop v="Off" />
          </group>
        </group>
      </list>
      <list name="Common settings (included)" v="1">
        <group name="Common settings">
          <Initialization_priority v="minimal priority" />
          <Watchdog v="No initialization" />
          <Saturation_mode v="Disabled" />
        </group>
      </list>
      <list name="Initialize shadow registers (included)" v="1">
        <boolgroup name="Initialize shadow registers" v="no" />
      </list>
      <list name="Initialize unused I/O pins (included)" v="1">
        <enumgroup name="Initialize unused I/O pins" v="No initialization">
          <Pull_resistor v="No initialization" />
          <Open_drain v="No initialization" />
          <Output_value v="no initialization" />
          <Include_Reset_pin v="no" />
          <Include_JTAG_pins v="no" />
        </enumgroup>
      </list>
      <group name="Internal peripherals">
        <list name="Shared Reset settings" v="1">
          <boolgroup name="Reset pin" v="Enabled">
            <Reset_Pin v="" />
            <Reset_Pin_signal v="" />
          </boolgroup>
        </list>
        <list name="Flash memory organization (included)" v="1">
          <group name="Flash memory organization">
            <list name="Shared FLASH settings" v="1">
              <group name="FlexNVM settings">
                <FlexNVM_size v="16 kW" />
                <D_flash_size v="16 kW" />
                <EEE_data_size v="0 words" />
                <boolgroup name="FlexRAM" v="Disabled" />
              </group>
            </list>
            <list name="Flash blocks" v="2">
              <group name="Flash block 0">
                <Address v="0" />
                <Size v="131072" />
                <Write_unit_size v="2" />
                <Erase_unit_size v="1024" />
                <Protection_unit_size v="4096" />
              </group>
              <group name="Flash block 1">
                <Address v="32768" />
                <Size v="16384" />
                <Write_unit_size v="2" />
                <Erase_unit_size v="512" />
                <Protection_unit_size v="512" />
              </group>
            </list>
          </group>
        </list>
        <list name="Flash config settings (included)" v="1">
          <boolgroup name="Flash configuration field" v="Disabled" />
        </list>
        <list name="Memory resource protection (include)" v="1">
          <enumgroup name="Memory resource protection" v="Disabled">
            <EmptySection_DummyValue />
          </enumgroup>
        </list>
        <group name="Peripheral clock rates">
          <QSCI0_clock_rate v="Auto select" />
          <QSCI1_clock_rate v="Auto select" />
          <QSCI2_clock_rate v="Auto select" />
        </group>
        <list name="SIM module (included)" v="1">
          <group name="System integration module">
            <group name="Common CPU settings">
              <WAIT_disable_mode v="Enabled" />
              <STOP_disable_mode v="Enabled" />
              <DMA_disable_mode v="All modes" />
              <OnCE_clock_to_core v="Enabled when core TAP is enabled" />
              <Reset_filter v="Disabled" />
              <Select_Master_PIT v="Master 0 and slave 1" />
            </group>
            <group name="Power controls">
              <Regulator_1_2_V_standby v="normal mode" />
              <Regulator_2_7_V_powerdown v="normal mode" />
              <Regulator_2_7_V_standby v="normal mode" />
              <Large_regulator_standby v="normal mode" />
            </group>
            <group name="Clock output selectors">
              <CLKOUT_divide_factor v="Divide by 1" />
              <CLKOUT0_select v="System clock" />
              <boolgroup name="CLKOUT0" v="Disabled" />
              <CLKOUT1_select v="System clock" />
              <boolgroup name="CLKOUT1" v="Disabled" />
            </group>
            <group name="Clock gating control in stop mode">
              <GPIOA_peripheral_clock_in_stop_mode v="Disabled" />
              <GPIOB_peripheral_clock_in_stop_mode v="Disabled" />
              <GPIOC_peripheral_clock_in_stop_mode v="Disabled" />
              <GPIOD_peripheral_clock_in_stop_mode v="Disabled" />
              <GPIOE_peripheral_clock_in_stop_mode v="Disabled" />
              <GPIOF_peripheral_clock_in_stop_mode v="Disabled" />
              <GPIOG_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_A_Channel_0_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_A_Channel_1_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_A_Channel_2_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_A_Channel_3_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_B_Channel_0_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_B_Channel_1_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_B_Channel_2_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_B_Channel_3_peripheral_clock_in_stop_mode v="Disabled" />
              <CAN_peripheral_clock_in_stop_mode v="Disabled" />
              <I2C0_peripheral_clock_in_stop_mode v="Disabled" />
              <I2C1_peripheral_clock_in_stop_mode v="Disabled" />
              <QSPI0_peripheral_clock_in_stop_mode v="Disabled" />
              <QSPI1_peripheral_clock_in_stop_mode v="Disabled" />
              <QSPI2_peripheral_clock_in_stop_mode v="Disabled" />
              <QSCI0_peripheral_clock_in_stop_mode v="Disabled" />
              <QSCI1_peripheral_clock_in_stop_mode v="Disabled" />
              <QSCI2_peripheral_clock_in_stop_mode v="Disabled" />
              <DAC_peripheral_clock_in_stop_mode v="Disabled" />
              <PDB0_peripheral_clock_in_stop_mode v="Disabled" />
              <PDB1_peripheral_clock_in_stop_mode v="Disabled" />
              <PIT0_peripheral_clock_in_stop_mode v="Disabled" />
              <PIT1_peripheral_clock_in_stop_mode v="Disabled" />
              <ENC_peripheral_clock_in_stop_mode v="Disabled" />
              <CRC_peripheral_clock_in_stop_mode v="Disabled" />
              <ADC16_peripheral_clock_in_stop_mode v="Disabled" />
              <ADC12_peripheral_clock_in_stop_mode v="Disabled" />
              <CMPA_peripheral_clock_in_stop_mode v="Disabled" />
              <CMPB_peripheral_clock_in_stop_mode v="Disabled" />
              <CMPC_peripheral_clock_in_stop_mode v="Disabled" />
              <CMPD_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_A_Channel_0_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_A_Channel_1_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_A_Channel_2_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_A_Channel_3_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_B_Channel_0_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_B_Channel_1_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_B_Channel_2_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_B_Channel_3_peripheral_clock_in_stop_mode v="Disabled" />
            </group>
            <group name="Clock gating control">
              <GPIOA_peripheral_clock v="Enabled" />
              <GPIOB_peripheral_clock v="Enabled" />
              <GPIOC_peripheral_clock v="Enabled" />
              <GPIOD_peripheral_clock v="Enabled" />
              <GPIOE_peripheral_clock v="Enabled" />
              <GPIOF_peripheral_clock v="Enabled" />
              <GPIOG_peripheral_clock v="Enabled" />
              <Timer_A_Channel_0_peripheral_clock v="Disabled" />
              <Timer_A_Channel_1_peripheral_clock v="Disabled" />
              <Timer_A_Channel_2_peripheral_clock v="Disabled" />
              <Timer_A_Channel_3_peripheral_clock v="Disabled" />
              <Timer_B_Channel_0_peripheral_clock v="Disabled" />
              <Timer_B_Channel_1_peripheral_clock v="Disabled" />
              <Timer_B_Channel_2_peripheral_clock v="Disabled" />
              <Timer_B_Channel_3_peripheral_clock v="Disabled" />
              <CAN_peripheral_clock v="Disabled" />
              <I2C0_peripheral_clock v="Disabled" />
              <I2C1_peripheral_clock v="Disabled" />
              <QSPI0_peripheral_clock v="Disabled" />
              <QSPI1_peripheral_clock v="Disabled" />
              <QSPI2_peripheral_clock v="Disabled" />
              <QSCI0_peripheral_clock v="Disabled" />
              <QSCI1_peripheral_clock v="Disabled" />
              <QSCI2_peripheral_clock v="Disabled" />
              <DAC_peripheral_clock v="Disabled" />
              <PDB0_peripheral_clock v="Disabled" />
              <PDB1_peripheral_clock v="Disabled" />
              <PIT0_peripheral_clock v="Disabled" />
              <PIT1_peripheral_clock v="Disabled" />
              <ENC_peripheral_clock v="Disabled" />
              <CRC_peripheral_clock v="Disabled" />
              <ADC16_peripheral_clock v="Disabled" />
              <ADC12_peripheral_clock v="Disabled" />
              <CMPA_peripheral_clock v="Disabled" />
              <CMPB_peripheral_clock v="Disabled" />
              <CMPC_peripheral_clock v="Disabled" />
              <CMPD_peripheral_clock v="Disabled" />
              <PWM_A_Channel_0_peripheral_clock v="Disabled" />
              <PWM_A_Channel_1_peripheral_clock v="Disabled" />
              <PWM_A_Channel_2_peripheral_clock v="Disabled" />
              <PWM_A_Channel_3_peripheral_clock v="Disabled" />
              <PWM_B_Channel_0_peripheral_clock v="Disabled" />
              <PWM_B_Channel_1_peripheral_clock v="Disabled" />
              <PWM_B_Channel_2_peripheral_clock v="Disabled" />
              <PWM_B_Channel_3_peripheral_clock v="Disabled" />
            </group>
            <group name="Peripheral protection">
              <Power_Mode_Control_Write v="Off" />
              <GPIO_Port_D v="Off" />
              <Peripheral_Clock_Enable v="Off" />
              <GPIO_and_Internal_Peripheral_Select v="Off" />
            </group>
            <boolgroup name="hidden properties" v="Disabled" />
          </group>
        </list>
        <list name="MCM module (included)" v="1">
          <group name="Miscellaneous control module">
            <Program_RAM_Base_Address v="0" />
            <Flash_Base_Address v="0" />
            <Resource_protection v="Disabled" />
            <Register_lock v="Disabled" />
            <AXBS_crossbar_switch_arbitration_scheme v="Fixed priority" />
            <Core_instruction_buffer v="Enabled" />
            <Core_new_shadow_region v="Enabled" />
            <Core_reverse_carry v="Enabled" />
            <_56800EX_instructions v="Enabled" />
            <group name="SoC control fields">
              <SoC_output_0_signal v="Disabled" />
              <SoC_output_1_signal v="Disabled" />
              <SoC_output_2_signal v="Disabled" />
              <SoC_output_3_signal v="Disabled" />
              <SoC_output_4_signal v="Disabled" />
              <SoC_output_5_signal v="Disabled" />
              <SoC_output_6_signal v="Disabled" />
              <SoC_output_7_signal v="Disabled" />
              <SoC_output_8_signal v="Disabled" />
              <SoC_output_9_signal v="Disabled" />
              <SoC_output_10_signal v="Disabled" />
              <SoC_output_11_signal v="Disabled" />
              <SoC_output_12_signal v="Disabled" />
              <SoC_output_13_signal v="Disabled" />
              <SoC_output_14_signal v="Disabled" />
              <SoC_output_15_signal v="Disabled" />
            </group>
          </group>
        </list>
        <list name="PMC module (included)" v="1">
          <boolgroup name="Power management controller" v="Disabled" />
        </list>
        <list name="FMC module (included)" v="1">
          <boolgroup name="Flexible memory controller" v="Disabled" />
        </list>
        <list name="GPIOA module (included)" v="1">
          <group name="GPIOA">
            <group name="GPIOA_Low">
              <Drive_strength_for_GPIOA0 v="Low" />
              <Slew_rate_for_GPIOA0 v="Fast" />
              <Drive_strength_for_GPIOA1 v="Low" />
              <Slew_rate_for_GPIOA1 v="Fast" />
              <Drive_strength_for_GPIOA2 v="Low" />
              <Slew_rate_for_GPIOA2 v="Fast" />
              <Drive_strength_for_GPIOA3 v="Low" />
              <Slew_rate_for_GPIOA3 v="Fast" />
              <Drive_strength_for_GPIOA4 v="Low" />
              <Slew_rate_for_GPIOA4 v="Fast" />
              <Drive_strength_for_GPIOA5 v="Low" />
              <Slew_rate_for_GPIOA5 v="Fast" />
              <Drive_strength_for_GPIOA6 v="Low" />
              <Slew_rate_for_GPIOA6 v="Fast" />
              <Drive_strength_for_GPIOA7 v="Low" />
              <Slew_rate_for_GPIOA7 v="Fast" />
            </group>
            <group name="GPIOA_High">
              <Drive_strength_for_GPIOA8 v="Low" />
              <Slew_rate_for_GPIOA8 v="Fast" />
              <Drive_strength_for_GPIOA9 v="Low" />
              <Slew_rate_for_GPIOA9 v="Fast" />
              <Drive_strength_for_GPIOA10 v="Low" />
              <Slew_rate_for_GPIOA10 v="Fast" />
              <Drive_strength_for_GPIOA11 v="Low" />
              <Slew_rate_for_GPIOA11 v="Fast" />
            </group>
          </group>
        </list>
        <list name="GPIOB module (included)" v="1">
          <group name="GPIOB">
            <group name="GPIOB_Low">
              <Drive_strength_for_GPIOB0 v="Low" />
              <Slew_rate_for_GPIOB0 v="Fast" />
              <Drive_strength_for_GPIOB1 v="Low" />
              <Slew_rate_for_GPIOB1 v="Fast" />
              <Drive_strength_for_GPIOB2 v="Low" />
              <Slew_rate_for_GPIOB2 v="Fast" />
              <Drive_strength_for_GPIOB3 v="Low" />
              <Slew_rate_for_GPIOB3 v="Fast" />
              <Drive_strength_for_GPIOB4 v="Low" />
              <Slew_rate_for_GPIOB4 v="Fast" />
              <Drive_strength_for_GPIOB5 v="Low" />
              <Slew_rate_for_GPIOB5 v="Fast" />
              <Drive_strength_for_GPIOB6 v="Low" />
              <Slew_rate_for_GPIOB6 v="Fast" />
              <Drive_strength_for_GPIOB7 v="Low" />
              <Slew_rate_for_GPIOB7 v="Fast" />
            </group>
            <group name="GPIOB_High">
              <Drive_strength_for_GPIOB8 v="Low" />
              <Slew_rate_for_GPIOB8 v="Fast" />
              <Drive_strength_for_GPIOB9 v="Low" />
              <Slew_rate_for_GPIOB9 v="Fast" />
              <Drive_strength_for_GPIOB10 v="Low" />
              <Slew_rate_for_GPIOB10 v="Fast" />
              <Drive_strength_for_GPIOB11 v="Low" />
              <Slew_rate_for_GPIOB11 v="Fast" />
            </group>
          </group>
        </list>
        <list name="GPIOC module (included)" v="1">
          <group name="GPIOC">
            <group name="GPIOC_Low">
              <Drive_strength_for_GPIOC0 v="Low" />
              <Slew_rate_for_GPIOC0 v="Fast" />
              <Drive_strength_for_GPIOC1 v="Low" />
              <Slew_rate_for_GPIOC1 v="Fast" />
              <Drive_strength_for_GPIOC2 v="Low" />
              <Slew_rate_for_GPIOC2 v="Fast" />
              <Drive_strength_for_GPIOC3 v="Low" />
              <Slew_rate_for_GPIOC3 v="Fast" />
              <Drive_strength_for_GPIOC4 v="Low" />
              <Slew_rate_for_GPIOC4 v="Fast" />
              <Drive_strength_for_GPIOC5 v="Low" />
              <Slew_rate_for_GPIOC5 v="Fast" />
              <Drive_strength_for_GPIOC6 v="Low" />
              <Slew_rate_for_GPIOC6 v="Fast" />
              <Drive_strength_for_GPIOC7 v="Low" />
              <Slew_rate_for_GPIOC7 v="Fast" />
            </group>
            <group name="GPIOC_High">
              <Drive_strength_for_GPIOC8 v="Low" />
              <Slew_rate_for_GPIOC8 v="Fast" />
              <Drive_strength_for_GPIOC9 v="Low" />
              <Slew_rate_for_GPIOC9 v="Fast" />
              <Drive_strength_for_GPIOC10 v="Low" />
              <Slew_rate_for_GPIOC10 v="Fast" />
              <Drive_strength_for_GPIOC11 v="Low" />
              <Slew_rate_for_GPIOC11 v="Fast" />
              <Drive_strength_for_GPIOC12 v="Low" />
              <Slew_rate_for_GPIOC12 v="Fast" />
              <Drive_strength_for_GPIOC13 v="Low" />
              <Slew_rate_for_GPIOC13 v="Fast" />
              <Drive_strength_for_GPIOC14 v="Low" />
              <Slew_rate_for_GPIOC14 v="Fast" />
              <Drive_strength_for_GPIOC15 v="Low" />
              <Slew_rate_for_GPIOC15 v="Fast" />
            </group>
          </group>
        </list>
        <list name="GPIOD module (included)" v="1">
          <group name="GPIOD">
            <Drive_strength_for_GPIOD0 v="Low" />
            <Slew_rate_for_GPIOD0 v="Fast" />
            <Drive_strength_for_GPIOD1 v="Low" />
            <Slew_rate_for_GPIOD1 v="Fast" />
            <Drive_strength_for_GPIOD2 v="Low" />
            <Slew_rate_for_GPIOD2 v="Fast" />
            <Drive_strength_for_GPIOD3 v="Low" />
            <Slew_rate_for_GPIOD3 v="Fast" />
            <Drive_strength_for_GPIOD4 v="Low" />
            <Slew_rate_for_GPIOD4 v="Fast" />
            <Drive_strength_for_GPIOD5 v="Low" />
            <Slew_rate_for_GPIOD5 v="Fast" />
            <Drive_strength_for_GPIOD6 v="Low" />
            <Slew_rate_for_GPIOD6 v="Fast" />
            <Drive_strength_for_GPIOD7 v="Low" />
            <Slew_rate_for_GPIOD7 v="Fast" />
          </group>
        </list>
        <list name="GPIOE module (included)" v="1">
          <group name="GPIOE">
            <group name="GPIOE_Low">
              <Drive_strength_for_GPIOE0 v="Low" />
              <Slew_rate_for_GPIOE0 v="Fast" />
              <Drive_strength_for_GPIOE1 v="Low" />
              <Slew_rate_for_GPIOE1 v="Fast" />
              <Drive_strength_for_GPIOE2 v="Low" />
              <Slew_rate_for_GPIOE2 v="Fast" />
              <Drive_strength_for_GPIOE3 v="Low" />
              <Slew_rate_for_GPIOE3 v="Fast" />
              <Drive_strength_for_GPIOE4 v="Low" />
              <Slew_rate_for_GPIOE4 v="Fast" />
              <Drive_strength_for_GPIOE5 v="Low" />
              <Slew_rate_for_GPIOE5 v="Fast" />
              <Drive_strength_for_GPIOE6 v="Low" />
              <Slew_rate_for_GPIOE6 v="Fast" />
              <Drive_strength_for_GPIOE7 v="Low" />
              <Slew_rate_for_GPIOE7 v="Fast" />
            </group>
            <group name="GPIOE_High">
              <Drive_strength_for_GPIOE8 v="Low" />
              <Slew_rate_for_GPIOE8 v="Fast" />
              <Drive_strength_for_GPIOE9 v="Low" />
              <Slew_rate_for_GPIOE9 v="Fast" />
            </group>
          </group>
        </list>
        <list name="GPIOF module (included)" v="1">
          <group name="GPIOF">
            <group name="GPIOF_Low">
              <Drive_strength_for_GPIOF0 v="Low" />
              <Slew_rate_for_GPIOF0 v="Fast" />
              <Drive_strength_for_GPIOF1 v="Low" />
              <Slew_rate_for_GPIOF1 v="Fast" />
              <Drive_strength_for_GPIOF2 v="Low" />
              <Slew_rate_for_GPIOF2 v="Fast" />
              <Drive_strength_for_GPIOF3 v="Low" />
              <Slew_rate_for_GPIOF3 v="Fast" />
              <Drive_strength_for_GPIOF4 v="Low" />
              <Slew_rate_for_GPIOF4 v="Fast" />
              <Drive_strength_for_GPIOF5 v="Low" />
              <Slew_rate_for_GPIOF5 v="Fast" />
              <Drive_strength_for_GPIOF6 v="Low" />
              <Slew_rate_for_GPIOF6 v="Fast" />
              <Drive_strength_for_GPIOF7 v="Low" />
              <Slew_rate_for_GPIOF7 v="Fast" />
            </group>
            <group name="GPIOF_High">
              <Drive_strength_for_GPIOF8 v="Low" />
              <Slew_rate_for_GPIOF8 v="Fast" />
              <Drive_strength_for_GPIOF9 v="Low" />
              <Slew_rate_for_GPIOF9 v="Fast" />
              <Drive_strength_for_GPIOF10 v="Low" />
              <Slew_rate_for_GPIOF10 v="Fast" />
              <Drive_strength_for_GPIOF11 v="Low" />
              <Slew_rate_for_GPIOF11 v="Fast" />
              <Drive_strength_for_GPIOF12 v="Low" />
              <Slew_rate_for_GPIOF12 v="Fast" />
              <Drive_strength_for_GPIOF13 v="Low" />
              <Slew_rate_for_GPIOF13 v="Fast" />
              <Drive_strength_for_GPIOF14 v="Low" />
              <Slew_rate_for_GPIOF14 v="Fast" />
              <Drive_strength_for_GPIOF15 v="Low" />
              <Slew_rate_for_GPIOF15 v="Fast" />
            </group>
          </group>
        </list>
        <list name="GPIOG module (included)" v="1">
          <group name="GPIOG">
            <group name="GPIOG_Low">
              <Drive_strength_for_GPIOG0 v="Low" />
              <Slew_rate_for_GPIOG0 v="Fast" />
              <Drive_strength_for_GPIOG1 v="Low" />
              <Slew_rate_for_GPIOG1 v="Fast" />
              <Drive_strength_for_GPIOG2 v="Low" />
              <Slew_rate_for_GPIOG2 v="Fast" />
              <Drive_strength_for_GPIOG3 v="Low" />
              <Slew_rate_for_GPIOG3 v="Fast" />
              <Drive_strength_for_GPIOG4 v="Low" />
              <Slew_rate_for_GPIOG4 v="Fast" />
              <Drive_strength_for_GPIOG5 v="Low" />
              <Slew_rate_for_GPIOG5 v="Fast" />
              <Drive_strength_for_GPIOG6 v="Low" />
              <Slew_rate_for_GPIOG6 v="Fast" />
              <Drive_strength_for_GPIOG7 v="Low" />
              <Slew_rate_for_GPIOG7 v="Fast" />
            </group>
            <group name="GPIOG_High">
              <Drive_strength_for_GPIOG8 v="Low" />
              <Slew_rate_for_GPIOG8 v="Fast" />
              <Drive_strength_for_GPIOG9 v="Low" />
              <Slew_rate_for_GPIOG9 v="Fast" />
              <Drive_strength_for_GPIOG10 v="Low" />
              <Slew_rate_for_GPIOG10 v="Fast" />
              <Drive_strength_for_GPIOG11 v="Low" />
              <Slew_rate_for_GPIOG11 v="Fast" />
            </group>
          </group>
        </list>
      </group>
      <group name="CPU interrupts">
        <boolgroup name="Interrupt SW0" v="Disabled" />
        <boolgroup name="Interrupt SW1" v="Disabled" />
        <boolgroup name="Interrupt SW2" v="Disabled" />
        <boolgroup name="Interrupt SW3" v="Disabled" />
        <boolgroup name="Interrupt LP" v="Disabled" />
        <boolgroup name="Interrupt PLL" v="Disabled" />
        <boolgroup name="Interrupt LVI" v="Disabled" />
        <boolgroup name="Interrupt Illegal Instruction" v="Disabled" />
        <boolgroup name="Interrupt Misalign Access" v="Disabled" />
        <boolgroup name="Interrupt HW Stack Overflow" v="Disabled" />
        <list name="MCM module (included)" v="1">
          <boolgroup name="Interrupt Core Fault" v="Enabled">
            <Interrupt v="INT_BUS_ERR" />
            <Interrupt_priority v="default" />
            <Core_fault_interrupt v="Enabled" />
          </boolgroup>
        </list>
      </group>
      <list name="Enabled speed modes (included)" v="1">
        <group name="Enabled speed modes">
          <boolgroup name="High speed mode" v="Enabled">
            <Input_clock_source_ v="Internal oscillator 8MHz" />
            <Clock_output_divider__Postscaler_ v="Auto select" />
            <System_clock__IP_Bus___MHz_ v="20" />
            <boolgroup name="PLL clock" v="Enabled">
              <PLL_multiplier v="Auto select" />
              <PLL_clock_frequency v="8" />
              <Enable_PLL_after_reset v="yes" />
            </boolgroup>
          </boolgroup>
          <boolgroup name="Low speed mode" v="Disabled" />
          <boolgroup name="Slow speed mode" v="Disabled" />
        </group>
      </list>
    </Properties>
    <Methods>
      <list name="CPUCond0" v="1">
        <SetHighSpeed v="don&amp;apos;t generate code" />
        <SetLowSpeed v="don&amp;apos;t generate code" />
        <SetSlowSpeed v="don&amp;apos;t generate code" />
        <GetSpeedMode v="don&amp;apos;t generate code" />
        <EnableInt v="generate code" />
        <DisableInt v="generate code" />
        <GetResetSource v="don&amp;apos;t generate code" />
        <SetWaitMode v="generate code" />
        <SetStopMode v="generate code" />
        <GetBusFreqHz v="don&amp;apos;t generate code" />
        <OpenBackDoor v="don&amp;apos;t generate code" />
        <SetFlexRAMFunction v="don&amp;apos;t generate code" />
        <SetFlexNVMPartition v="don&amp;apos;t generate code" />
        <InitShadowRegs v="don&amp;apos;t generate code" />
        <Delay100US v="don&amp;apos;t generate code" />
        <EnablePLL v="don&amp;apos;t generate code" />
      </list>
    </Methods>
    <Events>
      <Event_module_name v="Events" />
      <list name="CPUCond" v="1">
        <event name="OnReset" v="don&amp;apos;t generate code" />
        <event name="OnSwINT0" v="don&amp;apos;t generate code" />
        <event name="OnSwINT1" v="don&amp;apos;t generate code" />
        <event name="OnSwINT2" v="don&amp;apos;t generate code" />
        <event name="OnSwINT3" v="don&amp;apos;t generate code" />
        <event name="OnSwINTLP" v="don&amp;apos;t generate code" />
        <event name="OnPLLError" v="don&amp;apos;t generate code" />
        <event name="OnIllegalOpcode" v="don&amp;apos;t generate code" />
        <event name="OnMisalignData" v="don&amp;apos;t generate code" />
        <event name="OnHWStackError" v="don&amp;apos;t generate code" />
        <event name="OnLVI22" v="don&amp;apos;t generate code" />
        <event name="OnLVI27" v="don&amp;apos;t generate code" />
        <event name="OnCoreFault" v="don&amp;apos;t generate code" />
      </list>
    </Events>
    <Compiler v="CodeWarrior DSP C Compiler" />
    <CompilerProperties>
      <Compiler v="CodeWarrior DSP C Compiler" />
      <PESL_support v="no" />
      <Unhandled_interrupts v="One handler for all" />
      <group name="User initialization">
        <User_data_declarations>
          <StrgList></StrgList>
        </User_data_declarations>
        <User_code_before_PE_initialization>
          <StrgList></StrgList>
        </User_code_before_PE_initialization>
        <User_code_after_PE_initialization>
          <StrgList></StrgList>
        </User_code_after_PE_initialization>
      </group>
      <boolgroup name="Generate debugger files" v="yes">
        <Generate_mem_file v="yes" />
      </boolgroup>
      <boolgroup name="Generate linker file" v="yes">
        <Constants_in_xROM v="no" />
        <xROM_xRAM_mode v="no" />
        <pROM_xRAM_mode v="no" />
        <Stack_size v="512" />
        <Heap_size v="256" />
        <Set_memory_segments_to_default v="Click to set default &amp;gt;" />
        <Default_memory_for_interrupts v="INTERNAL FLASH" />
        <Default_memory_for_code v="INTERNAL FLASH" />
        <Default_memory_for_data v="INTERNAL RAM" />
        <list name="ROM/RAM Areas" v="4">
          <group name="MemoryArea0">
            <boolgroup name="ROM/RAM Area" v="Enabled">
              <Name v=".p_Interrupts" />
              <Address v="0" />
              <Size v="222" />
              <Qualifier v="RWX" />
            </boolgroup>
          </group>
          <group name="MemoryArea1">
            <boolgroup name="ROM/RAM Area" v="Enabled">
              <Name v=".p_Code" />
              <Address v="520" />
              <Size v="130552" />
              <Qualifier v="RWX" />
            </boolgroup>
          </group>
          <group name="MemoryArea2">
            <boolgroup name="ROM/RAM Area" v="Enabled">
              <Name v=".x_Data" />
              <Address v="1" />
              <Size v="16383" />
              <Qualifier v="RW" />
            </boolgroup>
          </group>
          <group name="MemoryArea3">
            <boolgroup name="ROM/RAM Area" v="Enabled">
              <Name v=".p_reserved_FCF" />
              <Address v="512" />
              <Size v="8" />
              <Qualifier v="RWX" />
            </boolgroup>
          </group>
        </list>
      </boolgroup>
      <list name="System paths " v="0">
        <EmptySection_DummyValue />
      </list>
      <list name="User paths " v="0">
        <EmptySection_DummyValue />
      </list>
      <list name="Libraries" v="0">
        <EmptySection_DummyValue />
      </list>
      <list name="User directories" v="0">
        <EmptySection_DummyValue />
      </list>
    </CompilerProperties>
  </CPU_Bean>
  <Bean name="CyclicADC" type="Init_ADC">
    <Enabled v="Y" />
    <Template v="CyclicADC" />
    <Properties>
      <Component_name v="CyclicADC" />
      <Device v="ADC12" />
      <group name="Settings">
        <group name="Clock setting">
          <Clock_divisor_select_value v="10" />
          <A_D_Frequency v="10 MHz" />
          <Speed_control v="clock frequency =&amp;lt; 5MHz" />
          <Clock_divisor_select_value_1 v="10" />
          <A_D_Frequency_1 v="10 MHz" />
          <Speed_control_1 v="clock frequency =&amp;lt; 5MHz" />
        </group>
        <Stop_mode__0_ v="yes" />
        <Stop_mode_1 v="yes" />
        <ADC_mode v="Triggered Parallel" />
        <enumgroup name="Parallel mode" v="simultaneous">
          <EmptySection_DummyValue />
        </enumgroup>
        <Trigger_mode__0_ v="SYNC input or START bit" />
        <Trigger_mode_1 v="SYNC input or START bit" />
        <Sampling_time__0_ v="2 ADC clocks" />
        <Sampling_time_1 v="2 ADC clocks" />
        <Power_savings_mode v="Disabled" />
        <Power_up_delay v="26" />
        <Auto_standby v="Disabled" />
        <DMA_trigger_source v="EOSI" />
        <boolgroup name="High volt. ref. source 0" v="internal" />
        <boolgroup name="Low volt. ref. source 0" v="internal" />
        <boolgroup name="High volt. ref. source 1" v="internal" />
        <boolgroup name="Low volt. ref. source 1" v="internal" />
        <group name="A/D Channels">
          <group name="Channels configuration">
            <ANA0_ANA1 v="Single ended mode" />
            <ANA2_ANA3 v="Single ended mode" />
            <ANB0_ANB1 v="Single ended mode" />
            <ANB2_ANB3 v="Single ended mode" />
            <ANA4_ANA5 v="Differential mode" />
            <ANA6_ANA7 v="Differential mode" />
            <ANB4_ANB5 v="Differential mode" />
            <ANB6_ANB7 v="Differential mode" />
          </group>
          <boolgroup name="Sample 0" v="Enabled">
            <Channel v="GPIOA4/ANA4/ANC8/CMPD_IN0" />
            <Channel_signal v="rt4" />
            <boolgroup name="Negative input" v="Enabled">
              <Channel v="GPIOA5/ANA5/ANC9" />
              <Channel_signal v="rt3" />
            </boolgroup>
          </boolgroup>
          <boolgroup name="Sample 1" v="Enabled">
            <Channel v="GPIOA6/ANA6/ANC10" />
            <Channel_signal v="" />
            <boolgroup name="Negative input" v="Enabled">
              <Channel v="GPIOA7/ANA7/ANC11" />
              <Channel_signal v="" />
            </boolgroup>
          </boolgroup>
          <boolgroup name="Sample 2" v="Disabled" />
          <boolgroup name="Sample 3" v="Disabled" />
          <boolgroup name="Sample 4" v="Disabled" />
          <boolgroup name="Sample 5" v="Disabled" />
          <boolgroup name="Sample 6" v="Disabled" />
          <boolgroup name="Sample 7" v="Disabled" />
          <boolgroup name="Sample 8" v="Enabled">
            <Channel v="GPIOB4/ANB4/ANC12/CMPC_IN1" />
            <Channel_signal v="rt1" />
            <boolgroup name="Negative input" v="Enabled">
              <Channel v="GPIOB5/ANB5/ANC13/CMPC_IN2" />
              <Channel_signal v="" />
            </boolgroup>
          </boolgroup>
          <boolgroup name="Sample 9" v="Enabled">
            <Channel v="GPIOB6/ANB6/ANC14/CMPB_IN1" />
            <Channel_signal v="rt2" />
            <boolgroup name="Negative input" v="Enabled">
              <Channel v="GPIOB7/ANB7/ANC15/CMPB_IN2" />
              <Channel_signal v="" />
            </boolgroup>
          </boolgroup>
          <boolgroup name="Sample 10" v="Disabled" />
          <boolgroup name="Sample 11" v="Disabled" />
          <boolgroup name="Sample 12" v="Disabled" />
          <boolgroup name="Sample 13" v="Disabled" />
          <boolgroup name="Sample 14" v="Disabled" />
          <boolgroup name="Sample 15" v="Disabled" />
          <boolgroup name="Internal trigger (0)" v="Disabled" />
          <boolgroup name="Internal trigger 1" v="Disabled" />
        </group>
        <group name="Zero crossing">
          <Sample_0 v="disabled" />
          <Sample_1 v="disabled" />
          <Sample_2 v="disabled" />
          <Sample_3 v="disabled" />
          <Sample_4 v="disabled" />
          <Sample_5 v="disabled" />
          <Sample_6 v="disabled" />
          <Sample_7 v="disabled" />
          <Sample_8 v="disabled" />
          <Sample_9 v="disabled" />
          <Sample_10 v="disabled" />
          <Sample_11 v="disabled" />
          <Sample_12 v="disabled" />
          <Sample_13 v="disabled" />
          <Sample_14 v="disabled" />
          <Sample_15 v="disabled" />
        </group>
        <group name="Low limit">
          <Low_limit_register_0 v="0" />
          <Low_limit_register_1 v="0" />
          <Low_limit_register_2 v="0" />
          <Low_limit_register_3 v="0" />
          <Low_limit_register_4 v="0" />
          <Low_limit_register_5 v="0" />
          <Low_limit_register_6 v="0" />
          <Low_limit_register_7 v="0" />
          <Low_limit_register_8 v="0" />
          <Low_limit_register_9 v="0" />
          <Low_limit_register_10 v="0" />
          <Low_limit_register_11 v="0" />
          <Low_limit_register_12 v="0" />
          <Low_limit_register_13 v="0" />
          <Low_limit_register_14 v="0" />
          <Low_limit_register_15 v="0" />
        </group>
        <group name="High limit">
          <High_limit_register_0 v="32760" />
          <High_limit_register_1 v="32760" />
          <High_limit_register_2 v="32760" />
          <High_limit_register_3 v="32760" />
          <High_limit_register_4 v="32760" />
          <High_limit_register_5 v="32760" />
          <High_limit_register_6 v="32760" />
          <High_limit_register_7 v="32760" />
          <High_limit_register_8 v="32760" />
          <High_limit_register_9 v="32760" />
          <High_limit_register_10 v="32760" />
          <High_limit_register_11 v="32760" />
          <High_limit_register_12 v="32760" />
          <High_limit_register_13 v="32760" />
          <High_limit_register_14 v="32760" />
          <High_limit_register_15 v="32760" />
        </group>
        <group name="Offset">
          <Offset_register_0 v="16384" />
          <Offset_register_1 v="16384" />
          <Offset_register_2 v="16384" />
          <Offset_register_3 v="16384" />
          <Offset_register_4 v="16384" />
          <Offset_register_5 v="16384" />
          <Offset_register_6 v="16384" />
          <Offset_register_7 v="16384" />
          <Offset_register_8 v="16384" />
          <Offset_register_9 v="16384" />
          <Offset_register_10 v="16384" />
          <Offset_register_11 v="16384" />
          <Offset_register_12 v="16384" />
          <Offset_register_13 v="16384" />
          <Offset_register_14 v="16384" />
          <Offset_register_15 v="16384" />
        </group>
        <group name="Gain control">
          <ANA0 v="x1 amplification" />
          <ANA1 v="x1 amplification" />
          <ANA2 v="x1 amplification" />
          <ANA3 v="x1 amplification" />
          <ANA4 v="x1 amplification" />
          <ANA5 v="x1 amplification" />
          <ANA6 v="x2 amplification" />
          <ANA7 v="x2 amplification" />
          <ANB0 v="x1 amplification" />
          <ANB1 v="x1 amplification" />
          <ANB2 v="x1 amplification" />
          <ANB3 v="x1 amplification" />
          <ANB4 v="x4 amplification" />
          <ANB5 v="x4 amplification" />
          <ANB6 v="x1 amplification" />
          <ANB7 v="x1 amplification" />
        </group>
        <group name="Scan control">
          <Sample_0 v="Continue" />
          <Sample_1 v="Continue" />
          <Sample_2 v="Continue" />
          <Sample_3 v="Continue" />
          <Sample_4 v="Continue" />
          <Sample_5 v="Continue" />
          <Sample_6 v="Continue" />
          <Sample_7 v="Continue" />
          <Sample_8 v="Continue" />
          <Sample_9 v="Continue" />
          <Sample_10 v="Continue" />
          <Sample_11 v="Continue" />
          <Sample_12 v="Continue" />
          <Sample_13 v="Continue" />
          <Sample_14 v="Continue" />
          <Sample_15 v="Continue" />
        </group>
      </group>
      <group name="Interrupts/DMA">
        <group name="Conversion complete (0)">
          <Interrupt v="INT_ADC12_CC0" />
          <End_of_scan_interrupt v="Disabled" />
          <Interrupt_priority v="medium priority" />
          <ISR_name v="ADC_EndofScanISR" />
          <DMA_request v="Disabled" />
        </group>
        <group name="Conversion complete 1">
          <Interrupt v="INT_ADC12_CC1" />
          <End_of_scan_interrupt v="Disabled" />
          <Interrupt_priority v="medium priority" />
          <ISR_name v="" />
          <DMA_request v="Disabled" />
        </group>
        <group name="Scan halted interrupt enable">
          <Sample_0 v="Disabled" />
          <Sample_1 v="Disabled" />
          <Sample_2 v="Disabled" />
          <Sample_3 v="Disabled" />
          <Sample_4 v="Disabled" />
          <Sample_5 v="Disabled" />
          <Sample_6 v="Disabled" />
          <Sample_7 v="Disabled" />
          <Sample_8 v="Disabled" />
          <Sample_9 v="Disabled" />
          <Sample_10 v="Disabled" />
          <Sample_11 v="Disabled" />
          <Sample_12 v="Disabled" />
          <Sample_13 v="Disabled" />
          <Sample_14 v="Disabled" />
          <Sample_15 v="Disabled" />
        </group>
        <group name="Zero crossing or limit error">
          <Interrupt v="INT_ADC12_ERR" />
          <Zero_crossing_interrupt v="Disabled" />
          <Low_limit_error_interrupt v="Disabled" />
          <High_limit_error_interrupt v="Disabled" />
          <Interrupt_priority v="medium priority" />
          <ISR_name v="" />
        </group>
      </group>
      <group name="Initialization">
        <Call_Init_method v="yes" />
        <Enable_peripheral_clock v="yes" />
        <Start_ADC_conversion__0_ v="no" />
        <Start_ADC_conversion_1 v="no" />
        <Power_down_ADC_0 v="no" />
        <Power_down_ADC_1 v="no" />
      </group>
    </Properties>
    <Methods>
      <Init v="generate code" />
    </Methods>
    <Events>
      <EmptySection_DummyValue />
    </Events>
  </Bean>
  <Bean name="COP1" type="Init_COP">
    <Enabled v="Y" />
    <Template v="COP1" />
    <Properties>
      <Component_name v="COP1" />
      <Device v="COP" />
      <group name="Settings">
        <group name="Clock settings">
          <Clock_select v="ROSC_8M" />
          <Prescaler v="divide by 1024" />
          <Counter_frequency v="7.8125 kHz" />
          <Timeout v="65535" />
          <Period v="8388.4800 ms" />
          <Interrupt_value v="255" />
          <Interrupt_time v="32.6400 ms" />
        </group>
        <Loss_of_reference v="Disabled" />
        <Stop_mode v="Disabled" />
        <Wait_mode v="Disabled" />
      </group>
      <group name="Interrupts">
        <group name="COP Warning">
          <Interrupt v="INT_COP_INT" />
          <Interrupt_priority v="default" />
          <ISR_Name v="" />
          <COP_Warning v="Disabled" />
        </group>
      </group>
      <group name="Initialization">
        <Enable_COP v="no" />
        <Write_protect v="no" />
        <Call_Init_method v="yes" />
      </group>
    </Properties>
    <Methods>
      <Init v="generate code" />
    </Methods>
    <Events>
      <EmptySection_DummyValue />
    </Events>
  </Bean>
  <Bean name="FMSTR1" type="FreeMaster">
    <Enabled v="Y" />
    <Template v="FMSTR1" />
    <Properties>
      <Component_name v="FMSTR1" />
      <Interrupt_mode v="Interrupt driven" />
      <enumgroup name="Device" v="SCI">
        <inhrbean type="Init_SCI">
          <Enabled v="Y" />
          <Template v="Init_SCI" />
          <Properties>
            <Component_name v="Inhr1" />
            <Device v="QSCI1" />
            <group name="Settings">
              <group name="Clock setting">
                <Baud_rate_divisor v="65" />
                <Fractional_baud_rate_divisor v="1" />
                <SCI_baud_rate v="95969.289827 Bd" />
              </group>
              <boolgroup name="Loop mode" v="Disabled" />
              <LIN_slave_mode v="Disabled" />
              <Data_format v="8 bits" />
              <Wake_up v="by idle line" />
              <Polarity v="normal" />
              <Parity v="none" />
              <SCI_in_Wait_mode v="Enabled" />
              <Stop_mode_entry_hold_off v="Disabled" />
              <Tx_FIFO_Watermark v="0" />
              <Rx_FIFO_Watermark v="0" />
              <FIFO_enable v="Disabled" />
              <Receiver_DMA_support_ v="Enabled" />
              <Transmitter_DMA_support_ v="Enabled" />
            </group>
            <group name="Pins">
              <RxD_pin v="GPIOF5/RXD1/XB_OUT9" />
              <RxD_pin_signal v="" />
              <TxD_pin v="GPIOF4/TXD1/XB_OUT8" />
              <TxD_pin_signal v="" />
            </group>
            <group name="Interrupts">
              <group name="Receiver full">
                <Interrupt v="INT_QSCI1_RCV" />
                <Receiver_full_interrupt v="Enabled" />
                <Interrupt_priority v="medium priority" />
                <ISR_name v="FMSTR1_Isr" />
              </group>
              <group name="Receiver error">
                <Interrupt v="INT_QSCI1_RERR" />
                <Receiver_error_interrupt v="Enabled" />
                <Interrupt_priority v="medium priority" />
                <ISR_name v="FMSTR1_Isr" />
              </group>
              <group name="Transmitter complete">
                <Interrupt v="INT_QSCI1_TIDLE" />
                <Transmitter_idle_interrupt v="Disabled" />
                <Interrupt_priority v="medium priority" />
                <ISR_name v="" />
              </group>
              <group name="Transmitter ready">
                <Interrupt v="INT_QSCI1_TDRE" />
                <Transmitter_empty_interrupt v="Enabled" />
                <Interrupt_priority v="medium priority" />
                <ISR_name v="FMSTR1_Isr" />
              </group>
            </group>
            <group name="Initialization">
              <Call_Init_method v="yes" />
              <Enable_peripheral_clock v="yes" />
              <Enable_SCI_Transmitter v="yes" />
              <Enable_SCI_Receiver v="yes" />
              <Receiver_wake_up_mode v="normal operation" />
            </group>
          </Properties>
          <Methods>
            <Init v="generate code" />
          </Methods>
          <Events>
            <EmptySection_DummyValue />
          </Events>
        </inhrbean>
      </enumgroup>
      <boolgroup name="Oscilloscope" v="Disabled" />
      <boolgroup name="Recorder" v="Disabled" />
      <boolgroup name="Application command" v="Disabled" />
      <boolgroup name="Target-side addressing" v="Disabled" />
      <group name="Initialization">
        <boolgroup name="Read/write memory commands" v="Enabled">
          <Read_memory v="Enabled" />
          <Write_memory v="Enabled" />
          <Write_memory_bits v="Enabled" />
        </boolgroup>
        <boolgroup name="Read/write variable commands" v="Disabled" />
        <Data_buffer_length v="11" />
      </group>
    </Properties>
    <Methods>
      <Poll v="generate code" />
      <Recorder v="don&amp;apos;t generate code" />
      <TriggerRec v="don&amp;apos;t generate code" />
      <SetUpRecBuff v="don&amp;apos;t generate code" />
      <GetAppCmd v="don&amp;apos;t generate code" />
      <GetAppCmdData v="don&amp;apos;t generate code" />
      <RegisterAppCmdCall v="don&amp;apos;t generate code" />
      <AppCmdAck v="don&amp;apos;t generate code" />
      <AppCmdSetResponseData v="don&amp;apos;t generate code" />
    </Methods>
    <Events>
      <EmptySection_DummyValue />
    </Events>
  </Bean>
  <Bean name="ForADC12Atrigger" type="Init_XBAR">
    <Enabled v="Y" />
    <Template v="ForADC12Atrigger" />
    <Properties>
      <Component_name v="ForADC12Atrigger" />
      <Device v="XBARA" />
      <group name="Settings">
        <Output_0_interrupt_assert v="Neither edge" />
        <Output_1_interrupt_assert v="Neither edge" />
        <Output_2_interrupt_assert v="Neither edge" />
        <Output_3_interrupt_assert v="Neither edge" />
      </group>
      <group name="Pins">
        <boolgroup name="Output 0 mux" v="Disabled" />
        <boolgroup name="Output 1 mux" v="Disabled" />
        <boolgroup name="Output 2 mux" v="Disabled" />
        <boolgroup name="Output 3 mux" v="Disabled" />
      </group>
      <group name="Interrupts">
        <group name="Output interrupt">
          <Interrupt v="INT_XBARA" />
          <Interrupt_priority v="default" />
          <ISR_Name v="" />
          <Output_0_interrupt_enable v="no" />
          <Output_1_interrupt_enable v="no" />
          <Output_2_interrupt_enable v="no" />
          <Output_3_interrupt_enable v="no" />
        </group>
      </group>
      <group name="Initialization">
        <Call_Init_method v="yes" />
      </group>
    </Properties>
    <Methods>
      <Init v="generate code" />
    </Methods>
    <Events>
      <EmptySection_DummyValue />
    </Events>
  </Bean>
  <Bean name="IdleLamp" type="Init_GPIO">
    <Enabled v="Y" />
    <Template v="IdleLamp" />
    <Properties>
      <Component_name v="IdleLamp" />
      <Device v="GPIOF" />
      <Device_signal v="GPIOF6" />
      <boolgroup name="Port control" v="Individual pins" />
      <list name="Pins" v="1">
        <group name="Pin">
          <Pin v="GPIOF6/TB2/PWMA_3X/PWMB_3X/XB_IN2" />
          <Pin_signal v="LED8" />
          <Direction v="Output" />
          <Output_value v="0" />
          <Pull_resistor v="no pull resistor" />
          <Open_drain v="push-pull" />
          <Drive_strength_for_GPIOF6 v="Low" />
          <Slew_rate_for_GPIOF6 v="Fast" />
          <Interrupt v="Disabled" />
          <Interrupt_polarity v="High" />
        </group>
      </list>
      <group name="Interrupt">
        <Interrupt v="INT_GPIOF" />
        <Priority v="default" />
        <ISR_name v="" />
      </group>
      <group name="Initialization">
        <Call_Init_method v="yes" />
        <Enable_peripheral_clock v="yes" />
      </group>
    </Properties>
    <Methods>
      <Init v="generate code" />
    </Methods>
    <Events>
      <EmptySection_DummyValue />
    </Events>
  </Bean>
  <Bean name="LEDs0to7" type="Init_GPIO">
    <Enabled v="Y" />
    <Template v="LEDs0to7" />
    <Properties>
      <Component_name v="LEDs0to7" />
      <Device v="GPIOE" />
      <Device_signal v="" />
      <boolgroup name="Port control" v="Individual pins" />
      <list name="Pins" v="8">
        <group name="Pin">
          <Pin v="GPIOE0/PWMA_0B" />
          <Pin_signal v="LED0" />
          <Direction v="Output" />
          <Output_value v="0" />
          <Pull_resistor v="no pull resistor" />
          <Open_drain v="push-pull" />
          <Drive_strength_for_GPIOE0 v="Low" />
          <Slew_rate_for_GPIOE0 v="Fast" />
          <Interrupt v="Disabled" />
          <Interrupt_polarity v="High" />
        </group>
        <group name="Pin">
          <Pin v="GPIOE1/PWMA_0A" />
          <Pin_signal v="LED1" />
          <Direction v="Output" />
          <Output_value v="0" />
          <Pull_resistor v="no pull resistor" />
          <Open_drain v="push-pull" />
          <Drive_strength_for_GPIOE1 v="Low" />
          <Slew_rate_for_GPIOE1 v="Fast" />
          <Interrupt v="Disabled" />
          <Interrupt_polarity v="High" />
        </group>
        <group name="Pin">
          <Pin v="GPIOE2/PWMA_1B" />
          <Pin_signal v="LED2" />
          <Direction v="Output" />
          <Output_value v="0" />
          <Pull_resistor v="no pull resistor" />
          <Open_drain v="push-pull" />
          <Drive_strength_for_GPIOE2 v="Low" />
          <Slew_rate_for_GPIOE2 v="Fast" />
          <Interrupt v="Disabled" />
          <Interrupt_polarity v="High" />
        </group>
        <group name="Pin">
          <Pin v="GPIOE3/PWMA_1A" />
          <Pin_signal v="LED3" />
          <Direction v="Output" />
          <Output_value v="0" />
          <Pull_resistor v="no pull resistor" />
          <Open_drain v="push-pull" />
          <Drive_strength_for_GPIOE3 v="Low" />
          <Slew_rate_for_GPIOE3 v="Fast" />
          <Interrupt v="Disabled" />
          <Interrupt_polarity v="High" />
        </group>
        <group name="Pin">
          <Pin v="GPIOE4/PWMA_2B/XB_IN2" />
          <Pin_signal v="LED4" />
          <Direction v="Output" />
          <Output_value v="0" />
          <Pull_resistor v="no pull resistor" />
          <Open_drain v="push-pull" />
          <Drive_strength_for_GPIOE4 v="Low" />
          <Slew_rate_for_GPIOE4 v="Fast" />
          <Interrupt v="Disabled" />
          <Interrupt_polarity v="High" />
        </group>
        <group name="Pin">
          <Pin v="GPIOE5/PWMA_2A/XB_IN3" />
          <Pin_signal v="LED5" />
          <Direction v="Output" />
          <Output_value v="0" />
          <Pull_resistor v="no pull resistor" />
          <Open_drain v="push-pull" />
          <Drive_strength_for_GPIOE5 v="Low" />
          <Slew_rate_for_GPIOE5 v="Fast" />
          <Interrupt v="Disabled" />
          <Interrupt_polarity v="High" />
        </group>
        <group name="Pin">
          <Pin v="GPIOE6/PWMA_3B/XB_IN4/PWMB_2B" />
          <Pin_signal v="LED6" />
          <Direction v="Output" />
          <Output_value v="0" />
          <Pull_resistor v="no pull resistor" />
          <Open_drain v="push-pull" />
          <Drive_strength_for_GPIOE6 v="Low" />
          <Slew_rate_for_GPIOE6 v="Fast" />
          <Interrupt v="Disabled" />
          <Interrupt_polarity v="High" />
        </group>
        <group name="Pin">
          <Pin v="GPIOE7/PWMA_3A/XB_IN5/PWMB_2A" />
          <Pin_signal v="LED7" />
          <Direction v="Output" />
          <Output_value v="0" />
          <Pull_resistor v="no pull resistor" />
          <Open_drain v="push-pull" />
          <Drive_strength_for_GPIOE7 v="Low" />
          <Slew_rate_for_GPIOE7 v="Fast" />
          <Interrupt v="Disabled" />
          <Interrupt_polarity v="High" />
        </group>
      </list>
      <group name="Interrupt">
        <Interrupt v="INT_GPIOE" />
        <Priority v="default" />
        <ISR_name v="" />
      </group>
      <group name="Initialization">
        <Call_Init_method v="yes" />
        <Enable_peripheral_clock v="yes" />
      </group>
    </Properties>
    <Methods>
      <Init v="generate code" />
    </Methods>
    <Events>
      <EmptySection_DummyValue />
    </Events>
  </Bean>
  <Bean name="TMR1" type="Init_TMR">
    <Enabled v="Y" />
    <Template v="TMR1" />
    <Properties>
      <Component_name v="TMR1" />
      <Device v="TMRB0" />
      <group name="Settings">
        <group name="Clock settings">
          <group name="Primary source">
            <Primary_source v="prescaler (IP BUS clock / 64)" />
          </group>
          <group name="Secondary source">
            <Secondary_source v="counter 0 input pin" />
          </group>
        </group>
        <Operation_mode v="Count mode" />
        <Count_once v="count repeatedly" />
        <Count_length v="count till compare, then reinitialize" />
        <Count_direction v="up" />
        <Master_mode v="Disabled" />
        <External_OFLAG_force v="Disabled" />
        <Forced_OFLAG_value v="0" />
        <Force_OFLAG_output v="no" />
        <Output_enable v="no" />
        <Output_polarity v="true" />
        <Input_polarity v="true" />
        <Co_channel_initialization v="Disabled" />
        <boolgroup name="Input capture mode" v="Disabled" />
        <Reload_on_Capture v="no" />
        <OutputMode v="toggle OFLAG output on successful compare" />
        <boolgroup name="Compare load control 1" v="Disabled" />
        <boolgroup name="Compare load control 2" v="Disabled" />
        <Debug_mode_action v="Normal operation" />
        <Fault v="Disabled" />
        <Alternative_load v="Disabled" />
        <boolgroup name="Input filter" v="Disabled" />
      </group>
      <group name="Pins">
        <boolgroup name="Output" v="Disabled" />
        <boolgroup name="Input 0" v="Disabled" />
        <boolgroup name="Input 1" v="Disabled" />
        <boolgroup name="Input 2" v="Disabled" />
        <boolgroup name="Input 3" v="Disabled" />
      </group>
      <group name="Interrupts / DMA">
        <group name="Timer Channel">
          <Interrupt v="INT_TMRB_0" />
          <Timer_compare_interrupt v="Disabled" />
          <Timer_overflow_interrupt v="Disabled" />
          <Input_edge_interrupt v="Disabled" />
          <Compare_1_interrupt v="Disabled" />
          <Compare_2_interrupt v="Disabled" />
          <Interrupt_priority v="default" />
          <ISR_name v="" />
          <Input_edge_DMA v="Disabled" />
          <Compare_1_DMA v="Disabled" />
          <Compare_2_DMA v="Disabled" />
        </group>
      </group>
      <group name="Registers">
        <Timer_Compare_register_1 v="782" />
        <Timer_Compare_register_2 v="0" />
        <Timer_Capture_register v="0" />
        <Timer_Load_register v="0" />
        <Timer_Counter_register v="0" />
        <Timer_Comparator_Load_register_1 v="0" />
        <Timer_Comparator_Load_register_2 v="0" />
      </group>
      <group name="Initialization">
        <Call_Init_method v="yes" />
        <Enable_peripheral_clock v="yes" />
        <Enable_channel v="yes" />
      </group>
    </Properties>
    <Methods>
      <Init v="generate code" />
    </Methods>
    <Events>
      <EmptySection_DummyValue />
    </Events>
  </Bean>
  <Bean name="DFR1" type="DSP_Func_DFR">
    <Enabled v="Y" />
    <Template v="DFR1" />
    <Properties>
      <Component_name v="DFR1" />
      <Use_assembler_files v="yes" />
      <boolgroup name="Memory management" v="Disabled" />
      <Saturation_mode v="Disabled" />
    </Properties>
    <Methods>
      <dfr16FIR v="generate code" />
      <dfr16FIRCreate v="don&amp;apos;t generate code" />
      <dfr16FIRHistory v="generate code" />
      <dfr16FIRDestroy v="don&amp;apos;t generate code" />
      <dfr16FIRInit v="generate code" />
      <dfr16FIRs v="generate code" />
      <dfr16FIRInt v="generate code" />
      <dfr16FIRIntCreate v="don&amp;apos;t generate code" />
      <dfr16FIRIntDestroy v="don&amp;apos;t generate code" />
      <dfr16FIRIntInit v="generate code" />
      <dfr16FIRDec v="generate code" />
      <dfr16FIRDecCreate v="don&amp;apos;t generate code" />
      <dfr16FIRDecDestroy v="don&amp;apos;t generate code" />
      <dfr16FIRDecInit v="generate code" />
      <dfr16IIR v="generate code" />
      <dfr16IIRCreate v="don&amp;apos;t generate code" />
      <dfr16IIRDestroy v="don&amp;apos;t generate code" />
      <dfr16IIRInit v="generate code" />
      <dfr16AutoCorr v="generate code" />
      <dfr16Corr v="generate code" />
      <dfr16CFFT v="generate code" />
      <dfr16CFFTCreate v="don&amp;apos;t generate code" />
      <dfr16CFFTDestroy v="don&amp;apos;t generate code" />
      <dfr16CFFTInit v="generate code" />
      <dfr16CIFFT v="generate code" />
      <dfr16CIFFTCreate v="don&amp;apos;t generate code" />
      <dfr16CIFFTDestroy v="don&amp;apos;t generate code" />
      <dfr16CIFFTInit v="generate code" />
      <dfr16RFFT v="generate code" />
      <dfr16RFFTCreate v="don&amp;apos;t generate code" />
      <dfr16RFFTDestroy v="don&amp;apos;t generate code" />
      <dfr16RFFTInit v="generate code" />
      <dfr16RIFFT v="generate code" />
      <dfr16RIFFTCreate v="don&amp;apos;t generate code" />
      <dfr16RIFFTDestroy v="don&amp;apos;t generate code" />
      <dfr16RIFFTInit v="generate code" />
      <dfr16Cbitrev v="generate code" />
    </Methods>
    <Events>
      <EmptySection_DummyValue />
    </Events>
  </Bean>
</PE_PROJECT_SETTINGS_DOCUMENTATION>

