Discover the LPC4300

The LPC4300 is the world's first Cortex-M architecture to combine a Cortex-M4 with a Cortex-M0. This dual-core approach increases performance and simplifies code partitioning without adding a lot of cost, complexity, or power consumption.

Dual core performance

With the LPC4300, you really do get the best of both worlds. A Cortex-M4 core, for when you want real-time processing, and a Cortex-M0 core, when you need real-time control. Both cores run at a blindingly fast 204 MHz, so you can choose the best core for a given task.

More memory

When it comes to memory, the LPC4300 has dual-bank Flash for higher efficiency, plus a big, DSP-friendly SRAM. The two banks of Flash can be used together as a single memory area or separately to support different operations simultaneously. Divided into five blocks, the SRAM includes blocks optimized for use with DSP functions and accessed by the Cortex-M4’s high-speed bus, and blocks connected to the standard AHB matrix. This divided block / bus architecture enables simultaneous CPU and DMA access with no memory contention.