A single toolchain

A single toolset

Some designers may be intimidated by a dual-core architecture, thinking that two cores means twice the work. But NXP's dual-core architecture is carefully designed to simplify debug and development. The Cortex-M4 and Cortex-M0 cores share a debug interface, so a single JTAG unit can be used to debug both cores at once. Also, a single toolset is used to program both cores, so you can work in a unified environment for the entire project.

LPCWare

At LPCware.com, you can communicate with other developers that have similar interests using NXP LPC devices. There are also many other resources for getting you up and running with your new hardware, such as tutorials, software or driver packages, tools, FAQs, design tips, and much more.

Compatibility across the Cortex-M continuum

Having software and tool compatibility across the entire NXP ARM portfolio means you can use a single toolset for all their designs. Pin-compatibility between certain architectures makes design migration even easier. For example, designers can create an initial product with the LPC1800 M3 core and then move to an LPC4300 M4 core for more performance. All without changing toolsets.