LPCOpen Platform for LPC112X microcontrollers  112X
LPCOpen Platform for the NXP LPC112X family of Microcontrollers
lpc_nandflash_k9f1g.c
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1 /*
2  * @brief K9F1G driver
3  *
4  * @note
5  * Copyright(C) NXP Semiconductors, 2012
6  * All rights reserved.
7  *
8  * @par
9  * Software that is described herein is for illustrative purposes only
10  * which provides customers with programming information regarding the
11  * LPC products. This software is supplied "AS IS" without any warranties of
12  * any kind, and NXP Semiconductors and its licensor disclaim any and
13  * all warranties, express or implied, including all implied warranties of
14  * merchantability, fitness for a particular purpose and non-infringement of
15  * intellectual property rights. NXP Semiconductors assumes no responsibility
16  * or liability for the use of the software, conveys no license or rights under any
17  * patent, copyright, mask work right, or any other intellectual property rights in
18  * or to any products. NXP Semiconductors reserves the right to make changes
19  * in the software without notification. NXP Semiconductors also makes no
20  * representation or warranty that such application will be suitable for the
21  * specified use without further testing or modification.
22  *
23  * @par
24  * Permission to use, copy, modify, and distribute this software and its
25  * documentation is hereby granted, under NXP Semiconductors' and its
26  * licensor's relevant copyrights in the software, without fee, provided that it
27  * is used in conjunction with NXP Semiconductors microcontrollers. This
28  * copyright, permission, and disclaimer notice must appear in all copies of
29  * this code.
30  */
31 
32 #include "board.h"
33 
40 /*****************************************************************************
41  * Private types/enumerations/variables
42  ****************************************************************************/
43 
44 /* Get column address of a page in a block */
45 #define COLUMN_ADDR(block, page) (block * K9F1G_PAGES_PER_BLOCK + page)
46 
47 /* NAND information */
50 };
51 
52 /*****************************************************************************
53  * Public types/enumerations/variables
54  ****************************************************************************/
55 
56 /*****************************************************************************
57  * Private functions
58  ****************************************************************************/
59 
60 /*****************************************************************************
61  * Public functions
62  ****************************************************************************/
63 /* Initialize flash */
65 {}
66 
67 /* De-initialize flash */
69 {}
70 
71 /* Get the flash size */
73 {
74  return &nandSize;
75 }
76 
77 /* Get flash ID */
78 void lpc_nandflash_get_id(uint8_t *pData)
79 {
80  uint8_t i = 0;
81 #if defined(BOARD_NAND_LOCKEDCS)
82  Board_NANDFLash_CSLatch(true);
83 #endif
84  Board_NANDFLash_WriteCmd(K9F1G_READ_ID);
85  Board_NANDFLash_WriteAddr(0x00);
86 
87  for (i = 0; i < sizeof(K9F1G_ID_T); i++) {
88  *pData = Board_NANDFLash_ReadByte();
89  pData++;
90  }
91 
92 #if defined(BOARD_NAND_LOCKEDCS)
93  Board_NANDFLash_CSLatch(false);
94 #endif
95 }
96 
97 /* Read status */
99 {
100  uint8_t data;
101 
102 #if defined(BOARD_NAND_LOCKEDCS)
103  Board_NANDFLash_CSLatch(true);
104 #endif
105  Board_NANDFLash_WriteCmd(K9F1G_READ_STATUS);
106  data = Board_NANDFLash_ReadByte();
107 #if defined(BOARD_NAND_LOCKEDCS)
108  Board_NANDFLash_CSLatch(false);
109 #endif
110 
111  return data;
112 }
113 
114 /* Erase block */
115 void lpc_nandflash_erase_block(uint32_t block)
116 {
117  uint32_t row = COLUMN_ADDR(block, 0);
118 
119 #if defined(BOARD_NAND_LOCKEDCS)
120  Board_NANDFLash_CSLatch(true);
121 #endif
122  Board_NANDFLash_WriteCmd(K9F1G_BLOCK_ERASE_1);
123 
124  /* Write address */
125  Board_NANDFLash_WriteAddr(row & 0xFF);
126  Board_NANDFLash_WriteAddr((row >> 8) & 0xFF);
127 
128  Board_NANDFLash_WriteCmd(K9F1G_BLOCK_ERASE_2);
129 #if defined(BOARD_NAND_LOCKEDCS)
130  Board_NANDFLash_CSLatch(false);
131 #endif
132 }
133 
134 /* Write buffer to flash */
135 uint32_t lpc_nandflash_write_page(uint32_t block, uint32_t page, uint8_t *data, uint32_t size)
136 {
137  uint32_t i = 0;
138  uint32_t row = COLUMN_ADDR(block, page);
139 
140 #if defined(BOARD_NAND_LOCKEDCS)
141  Board_NANDFLash_CSLatch(true);
142 #endif
143  Board_NANDFLash_WriteCmd(K9F1G_PAGE_PROGRAM_1);
144 
145  /* Write address*/
146  Board_NANDFLash_WriteAddr(0x00);
147  Board_NANDFLash_WriteAddr(0x00);
148  Board_NANDFLash_WriteAddr(row & 0xFF);
149  Board_NANDFLash_WriteAddr((row >> 8) & 0xFF);
150 
151  /*Write data */
152  for (i = 0; i < size; i++) {
153  Board_NANDFLash_WriteByte(*data);
154  data++;
155  }
156 
157  Board_NANDFLash_WriteCmd(K9F1G_PAGE_PROGRAM_2);
158 #if defined(BOARD_NAND_LOCKEDCS)
159  Board_NANDFLash_CSLatch(false);
160 #endif
161  return i;
162 }
163 
164 /* Start reading data from flash */
165 void lpc_nandflash_read_start(uint32_t block, uint32_t page, uint32_t ofs)
166 {
167  uint32_t row = COLUMN_ADDR(block, page);
168 
169 #if defined(BOARD_NAND_LOCKEDCS)
170  Board_NANDFLash_CSLatch(true);
171 #endif
172  Board_NANDFLash_WriteCmd(K9F1G_READ_1);
173 
174  /* Write address */
175  Board_NANDFLash_WriteAddr(ofs & 0xFF);
176  Board_NANDFLash_WriteAddr((ofs >> 8) & 0xFF);
177  Board_NANDFLash_WriteAddr(row & 0xFF);
178  Board_NANDFLash_WriteAddr((row >> 8) & 0xFF);
179 
180  Board_NANDFLash_WriteCmd(K9F1G_READ_2);
181 #if defined(BOARD_NAND_LOCKEDCS)
182  Board_NANDFLash_CSLatch(false);
183 #endif
184 }
185 
186 /* Read data from flash */
187 void lpc_nandflash_read_data(uint8_t *data, uint32_t size)
188 {
189  uint32_t i = 0;
190 
191 #if defined(BOARD_NAND_LOCKEDCS)
192  Board_NANDFLash_CSLatch(true);
193 #endif
194  for (i = 0; i < size; i++) {
195  *data = Board_NANDFLash_ReadByte();
196  data++;
197  }
198 #if defined(BOARD_NAND_LOCKEDCS)
199  Board_NANDFLash_CSLatch(false);
200 #endif
201 }
202