Introduction to MOS Model 20
MOS Model 20 is a new compact LDMOS model, which combines the MOSFET operation of the channel region with that of the drift region under the thin gate oxide. As such, it is aimed as a successor of MOS model 9 in series with MOS model 31 or MOS model 11 in series with MOS model 31. MOS Model 20 has especially been developed to improve the convergence behaviour during simulation, by having the voltage at the transition from the channel region to the drift region calculated inside the model itself.
Model definition of MOS Model 20
The model definition of MOS Model 20 is available as PDF files:
MOS model 20, level 2002, is an updated version of level 2001. In addition to level 2001, level 2002 includes velocity saturation in the drift region.
The description of the drain-bulk and source-bulk junction diode is not included in MOS Model 20. The behaviour of these junction diodes can be modelled by adding appropriate junction models, like for instance the Juncap model.
The history of MOS Model 20 can be found here.
Source Code & Library
The source code of MOS Model 20 is available here. The files containing the MOS Model 20 level 2001 and level 2002 code are called "device_m2001.c" and "device_m2002.c" respectively. If you use the included solver, please make sure that you compile on a system that supports Fortran 77.
The history of the source code can be found here.
The models are included in a dynamically loaded library called SiMKit.
SiMKit is related to the following circuit simulators used within NXP:
- Pstar, the circuit simulator from NXP
- Spectre, the circuit simulator from Cadence
- ADS, the circuit simulator from Agilent
You can read how to download and install the libraries here.
The source code is protected by Copyright © 1991, 2007, NXP.
Further information on MOS Model 20 is available in the following additional documentation:
- Documentation for level 2002: prtn2005_00406.pdf file. Last update May 2009.
- Documentation for Level 2001: prtn2003_00301.pdf file. Last update October 2004.
- MOS model 20, a versatile LDMOS model, A.C.T. Aarts and D.B.M. Klaassen, CMC meeting May 2006 (1672 Kb).
Further information on MOS Model 20 is available in the following related publications:
- "A robust and physically Based Compact SOI-LDMOS Model", A.C.T. Aarts and R. van Langevelde, Proceedings ESSDERC 2002, pp. 455-458, 2002.
- "Compact Modeling of High-Voltage LDMOS Devices Including Quasi-Saturation", A.C.T. Aarts and W.J. Kloosterman
- "New Fundamental Insights Into Capacitance Modeling of Laterally Nonuniform MOS Devices", A.C.T. Aarts, R. van der Hout, J.C.J. Paasschens, A.J. Scholten, M.B. Willemsen, and D.B.M. Klaassen
- "A Surface-Potential-Based High-Voltage Compact LDMOS Transistor Model", A.C.T. Aarts, N.D. Halleweyn, and R. van Langevelde
- "Capacitance modeling of laterally non-uniform MOS devices", A.C.T. Aarts, R. van der Hout , J.C.J. Paasschens, A.J. Scholten, M. Willemsen, and D.B.M. Klaassen
- "Compact Modelling of High-Voltage LDMOS Devices", A.C.T. Aarts, R. van der Hout, R. van Langevelde, A.J. Scholten, M.B. Willemsen and D.B.M. Klaassen, Proceedings NSTI Nanotech 2005 (Anaheim CA)(Conf. ISBN 0-9767985-3-0 WCM 2005, 93-98)
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