Code history

Model history

Since the updates for SiMKit 3.1 (May 2008) the code history is included in the model history. Older code history can be found below.

MOS Model PSP level 103

Below is an overview of the relation between level and code versions.
The background of the compact model identification scheme can be read here.

PSP level 103 is available in two model variants: normal and NQS. Both variants have the same level version and implementation number.

PSP103 SiMKit
level.version.implementation release date
103.1.1 3.7 2011-08-04
103.1.1 3.6 2011-01-18
103.1.1 3.5.2 2010-10-12
103.1.1 3.4 2009-12-17
103.1.0 3.3 2009-06-25
103.0.0 3.2 2008-12-02
2011/08 Release of MOS MODEL PSP 103.1.1
   
 
  • The noise results did not depend on the value of the parameter EF, this has been corrected.
  • When the instance parameter MULT is set to zero, the model evaluation is done more efficiently. All OP output for the device is set to zero in this case.
  • Minor bug-fix in the calculation of sqrtfw, lp_agidl and lp_bgidl
2010/10 Release of MOS MODEL PSP 103.1.1
   
 
  • The induced gate noise limiting at high frequencies was updated. Now there is an exact match between the PSP103 Verilog-A code and SiMKit
2009/12 Release of MOS MODEL PSP 103.1.1
   
 
  • Implementation of MULT-scaling has been moved to contribution statements.
  • A minor bug in the MULT-scaling of 1/f-noise-related OP-output parameters has been fixed.
  • A minor implementation change in the NUD model.
  • Minor change in the induced gate noise contributions: the contribution has been split up in two components to be able to manage source-drain interchange properly.
2009/06 Release of MOS MODEL PSP 103.1.0
   
 
  • Added external sheet resistance RSHD for drain diffusion (used when SWJUNASYM=1)
  • Added model for non-uniform doping (NUD). The model can be invoked on by setting SWNUD = 1. A separate surface potential calculation is carried out such that the NUD-model does not affect the CV results. Optionally, SWNUD = 2 can be used to circumvent the extra surface potential calculation. However, this may result in non-reciprocal capacitances. Related model parameters: GFACNUDO, GFACNUDL, GFACNUDLEXP, GFACNUDW, GFACNUDLW, VSBNUDO and DVSBNUDO (global model),GFACNUD, VSBNUD and DVSBNUD (local model) and POGFACNUD, PLGFACNUD, PWGFACNUD, PLWGFACNUD, POVSBNUD and PODVSBNUD (binning model).
  • Extended NUD-model to allow for retrograde profiles (GFACNUD > 1)
  • Added value of gate resistance to OP-output
  • Bugfix and minor implementation change in NUD-model
  • Previously, the induced gate noise sources were erroneously connected to the gate terminal rather than to the internal gate node GP. This has been corrected in this release. This fix may lead to different simulation results at high frequencies.
2008/12 Release of MOS MODEL PSP 103.0.0
   
 
  • Global, local and binning models have been unified. By setting the new parameter SWGEO to 0, 1 (default), or 2, the local, global, or binning model is selected.
  • Added model for non-uniform doping (NUD). The model can be invoked on by setting SWNUD = 1. A separate surface potential calculation is carried out such that the NUD-model does not affect the CV results. Optionally, SWNUD = 2 can be used to circumvent the extra surface potential calculation. However, this may result in non-reciprocal capacitances. Related model parameters: GFACNUDO, GFACNUDL, GFACNUDLEXP, GFACNUDW, GFACNUDLW, VSBNUDO and DVSBNUDO (global model),GFACNUD, VSBNUD and DVSBNUD (local model) and POGFACNUD, PLGFACNUD, PWGFACNUD, PLWGFACNUD, POVSBNUD and PODVSBNUD (binning model).
  • Added Vth-adjustment model for CV. It can be turned on by setting SWDELVTAC =1. Note that this requires an extra computation of surface potentials. Related model parameters FACNEFFACO, FACNEFFACL, FACNEFFACW, FACNEFFACLW, DELVTACO, DELVTACL, DELVTACLEXP, DELVTACW, and DELVTACLW (global), FACNEFFAC and DELVTAC (local), POFACNEFFAC, PLFACNEFFAC, PWFACNEFFAC, PLWFACNEFFAC, PODELVTAC, PLDELVTAC, PWDELVTAC and PLWDELVTAC (binning model).
  • Added external diffusion resistances to source and drain. Added related parameters RSH, NRS, and NRD (global and binning model), RSE and RDE to local model.- Modified geometrical scaling rules for the following parameters: VFB, STVFB, DPHIB, STBET and STTHESAT.
  • Replaced binning rule for BETN. Added related binning parameters P2OBETN, P2LBETN, P2WBETN and P2LWBETN.- Removed the effect of FETA from CV.- Added local parameter values (after scaling, T-scaling, LOD-effects, and clipping) to OP-output.
  • Fixed bug in JUNCAP2-model, involving FJUNQ-based selection-criterion in JUNCAP-express charge model.
  • The implementation of "scale" (to allow for the use of scale, scalefactor, scalem in Cadence-software) has been fixed- Some further minor bug-fixes and implementation changes.
  • PSP 103.0 is not backwards compatible with the previous version, PSP 102.3, for the following reasons: Unified local/global/binning models require addition of SWGEO to parameter set; Some global scaling rules changed; Binning-rule for BETN changed; FETA no longer affects CV.
  • The NQS code has been made more robust, some existing DC convergence problems in Spectre have been solved.

MOS Model PSP level 102

Below is an overview of the relation between level and code versions.
The background of the compact model identification scheme can be read here.

PSP level 102 is available in six model variants: local, global, binning, NQS local, NQS global, NQS binning. All variants have the same level version and implementation number.

PSP102 SiMKit
level.version.implementation release date
102.3.4 3.7 2011-08-04
102.3.4 3.6 2011-01-18
102.3.4 3.5.2 2010-10-12
102.3.4 3.4 2009-12-17
102.3.3 3.3 2009-06-25
102.3.2 3.2 2008-12-02
102.3.1 3.1.2 2008-07-24
102.3.0 3.1 2008-05-21
102.2.1 3.0.3 2008-01-31
102.1.1 2.5 2007-04-30
102.1.0 2.4 2006-10-23
102.0.0 2.3.2 2006-07-07
2011/08 Release of MOS MODEL PSP 102.3.4
   
 
  • When the instance parameter MULT is set to zero, the model evaluation is done more efficiently. All OP output for the device is set to zero in this case.
  • Minor bug-fix in the calculation of sqrtfw, lp_agidl and lp_bgidl
2011/01 Release of MOS MODEL PSP 102.3.4
   
 
  • PSP102 is implemented in a thread-safe way
2010/10 Release of MOS MODEL PSP 102.3.4
   
 
  • The induced gate noise limiting at high frequencies was updated. Now there is an exact match between the PSP102 Verilog-A code and SiMKit
  • The default value of the parameter SCREF - the distance between OD-edge and well edge of a reference device - has been set to 1e-6, as is documented.
2009/12 Release of MOS MODEL PSP 102.3.4
   
 
  • A number of OP parameters, all starting with “table_” have been TEMPORARILY added to the PSP model to assure correct simulation results for PSP102 in UltraSim (Cadence). The user is advised NOT to make use of, or rely on these OP parameters. They may be removed again in subsequent SiMKit versions.
  • Implementation of MULT-scaling has been moved to contribution statements.
  • A minor bug in the MULT-scaling of 1/f-noise-related OP-output parameters has been fixed.
  • Minor change in the induced gate noise contributions: the contribution has been split up in two components to be able to manage source-drain interchange properly.
2009/6 Release of MOS MODEL PSP 102.3.3
   
 
  • Added value of gate resistance to OP-output.
  • Minor bug fix in conditional for SP-calculation of overlap areas.
  • Previously, the induced gate noise sources were erroneously connected to the gate terminal rather than to the internal gate node GP. This has been corrected in this release. This fix may lead to different simulation results at high frequencies.
2008/12 Release of MOS MODEL PSP 102.3.2
   
 
  • Fixed bug in JUNCAP2-model, involving FJUNQ-based election-criterion inJUNCAP-express charge model.
  • The NQS code has been made more robust, some existing DC convergence problems in Spectre have been solved.
2008/05 Release of MOS MODEL PSP 102.3.0
   
 
  • For a number of effects in the MOSFET an extra set of parameters has beenintroduced, so that the consequences of a special drain-junction (differentfrom the source junction) can be modeled.

    These are the effects:
    1. junction currents and capacitances
    2. gate current (the overlap part)
    3. overlap-capacitances and fringe capacitances
    4. GIDL
  • The new model has a switching parameter SWJUNASYM = 0 or 1 in order to allow backwards compatibility.
    * When SWJUNASYM=0 (default) the model works as before. For both source and drain-side the source parameters are used. If drain-side parameters are set they will be ignored
    * When SWJUNASYM=1 the model becomes asymmetric. For the source side the source parameters are used for the drain-side the drain parameters are used.
  • Added exponent EF in the 1/f noise. (flicker noise)
  • More flexible scaling of NFA, NFB, NFC (flicker noise coefficients)
  • Changed clipping of NP (gate poly-silicon doping)
  • The NQS network in PSPNQS has been implemented by making use of the flexible topology. This implies that when SWNQS is smaller than 9 the PSPNQS model will contain less internal nodes, and therefore is faster than before.
2008/01 Release of MOS MODEL PSP 102.2.0
   
 
  • Added a "Well Proximity Effect"-model
  • Added parameters EPSROX (electrical or local), EPSROXO (geometrical or global),POEPSROX (binning) representing relative dielectric constant of gate oxide. Default value is 3.9. Note that introduction of this parameter leads to small numerical differences as compared to PSP 102.1. These differences are typically smaller than 1e-4.
  • Added instance parameters DELVTO (threshold voltage shift parameter) and FACTUO (zero-field mobility pre-factor) to the electrical (or local), geometrical (or global) and binning model.
  • Added NF (number of fingers) support to geometrical (or global) and binning model.
  • Extended the stress model to support NF.
  • Added substrate resistance network and external gate resistance to the QS version of the PSP-model. This implied adding RGO, RBULKO, RWELLO, RJUNSO, RJUNDO (geometrical or global and binning), and RG, RBULK, RWELL, RJUNS, RJUND (electrical or local) to the PSP-model. Now, PSP and PSPNQS have an identical topology for the parasitic resistance network. Note that addition of the parasitic resistance network to PSP implies that PSP now has five internal nodes. When one or more of the resistor values are set to zero, the SiMKit will remove superfluous internalnodes. As a result, there is no computational overhead if the parasitic resistances are not used. For PSP as well as PSPNQS the default value of the parasitic resistances is zero. Note that for PSPNQS these defaults used to be 1e-3 Ohm in previous SiMKit versions.
  • Added geometry scaling for gate resistance in global and binning model. This involved addition of model parameters:
    • RSHG (Gate electrode diffusion sheet resistance),
    • RINT (Contact resistance between silicide and poly),
    • DLSIL (Silicide extension over the physical gate length),
    • RVPOLY (Vertical poly resistance) and instance parameters:
    • NGCON (Number of gate contacts) and
    • XGW (Distance from the gate contact to the channel edge).
  • Integration of JUNCAP-express into PSP. PSP is equipped with a switch-parameter SWJUNEXP. When SWJUNEXP=0 (default) the full JUNCAP2 model is evaluated, similar to previous version of PSP. When SWJUNEXP=1, the Express-model will be evaluated leading to a very significant reduction of model-evalutation time for the PSP-model. (The same holds for the standalone JUNCAP2 model). Moreover, this involved the addition of two parameters VJUNREF and FJUNQ.
  • Reformulation of impact ionisation code to avoid numerical problems.
  • Some minor updates amongst which:
    • solved issue with Gmin for Vds<0.
    • corrected error in expression for OP-variable cjssti.
    • added clipping for fbbt-variables to nonnegative values (JUNCAP).
    • fixed issue in calculation of vfmin (JUNCAP).
    • minor implementation change in JUNCAP init instance.
    • fixed noise calculation for parasitic resistance.
2007/04 Release of MOS MODEL PSP 102.1.1
   
 
  • Induced gate noise limiting (i.e. the cut-off of the f2 dependency of the induced gate noise at high frequency) has been improved in Spectre and ADS.
  • In certain cases, the calculation of the surface potential in the gate overlap region was missing in Spectre and ADS. The derived gate current was therefore incorrect. The problem only applies when the switch parameter SWIGATE is on.
  • Several actions for speeding up the model evaluation.
   
2006/10 Release of MOS MODEL PSP 102.1.0
   
 
  • The PSPNQS model is now available in the SiMKit. This spline collocation-based nonquasi-static (NQS) model is developed to include all regions of operation and small geometry effects. This SiMKit implementation has some known limitations that could cause convergence problems.
  • Several minor changes and improvements to the model implementation.
  • Solved small problem in stress model.
  • The initial guess for PSP was implemented incorrectly for p-type devices, this has been corrected for the implementation in Spectre. For Pstar the problem still needs to be solved.
   
2006/07 Release of MOS MODEL PSP 102.0.0
  PSP 102.0.0 is an updated version of PSP 101.0
 
The following changes and additions have been made to the model:
  • When SWJUNCAP (flag for Juncap) equals 2, the gate-edge length of the junction is now correctly set to the effective transistor width.
  • The scaling rule for DPHIB (offset parameter for PHIB) has been changed. Existing parameter sets for PSP 101.0 can easily be converted to work with PSP 102.0. The only change required is to set DPHIBL (in PSP 102.0) = DPHIB0 * DPHIBL (both from PSP 101.0). After conversion, the simulation results will be identical.
  • A minor numerical issue has been resolved.
  • Clipping and limiting of NP (gate poly-silicon doping) has been made more transparent; poly depletion is switched off for NP=0 (or NPO=0 in the global model) only.
  • A coding error in Juncap2 has been solved.
  • The parameters LVARW (width dependence of LVAR) and WVARL (length dependence of WVAR) have been removed from the binning model in order to ensure the continuity of parameters across bin-boundaries.
  • A coding error in the equation for Kvth0 (threshold shift parameter, stress model) has been resolved.

MOS Model PSP, level 101

Below is an overview of the relation between level and code versions.
The background of the compact model identification scheme can be read here.

Level version Implementation number Code revision
SiMKit
      Release Date
101.0 local 101.0.0 1.7 2.3 2006-03-16
101.0 global 101.0.0 1.8 2.3 2006-03-16
101.0 binning 101.0.0 1.9 2.3 2006-03-16
2006/03 Release of MOS MODEL PSP 101.1.0
  The modifications to PSP level 100 have upgraded the model PSP level 101.
 
The following changes and additions have been made to the model:
  • A complete set of binning scaling rules has been added as a phenomenological alternative to the physics-based geometrical scaling rules.
  • BSIM-like instance parameters AS, AD, PS and PD were added to the junction model.
  • Zeros no longer occur in parameter names.
  • Induced gate noise limiting has been implemented in PSP.
  • Some global parameters names have an additional "O" in their names in order to avoid duplicate names in the global and local model.

The following changes and additions have been made to the electrical model PSP level 101:
  • The parameters AF, BF,F0 and NSUB have been replaced by DPHIB and NEFF.
  • The CLM-model has been modified to improve the Gummel-symmetry properties of the model.
  • The drain induced barrier lowering model has been modified.
  • A new parameter FETA has been introduced.
  • The range of the parameters THESATG, THESATB, RSG, and RSB has been extended to include negative values.
  • Inner-fringe capacitances have been removed, in order to ensure the reciprocity of capacitances at Vds=0.
  • Model behavior at large (>1V) forward Vb has been improved.
  • Gummel-symmetry properties at forward Vb have been improved.
  • The SO parameter has been removed. Its value has been fixed to the default (SO=0.98).

The following changes and additions have been made to the geometrical scaling rules PSP level 1010:
  • Length-scaling for CS has been added; this greatly improves short-channel idvg and gm fits.
  • Scaling rules for the new parameters NEFF and DPHIB have been added.
  • L*W-scaling has been added for THESAT and CT.
  • ALP2 scaling has been modified.
  • Length-scaling for A4 has been added.
  • The parameters DLQ and DWQ have been added to allow for an offset in delta-L between IV and CV.

The following maintenance has been made to the model:
  • Gate current now exactly vanishes at zero bias.
  • Some numerical issues were solved.
  • Some minor bugs in the JUNCAP2 implementation within PSP were solved.
  • Junctions are no longer swapped when Vds<0.

MOS Model PSP, level 100

Below is an overview of the relation between level and code versions.
The background of the compact model identification scheme can be read here.

Level version Implementation number Code revision
SiMKit
      Release Date
100.1 global 100.1.0 1.23 2.2 2005-08-03
100.1 local 100.1.0 1.22 2.2 2005-08-03
100.0 global 100.0.1 1.13 2.1.1 2005-04-11
100.0 local 100.0.1 1.11 2.1.1 2005-04-11
2005/08 Release of MOS MODEL PSP 100.0.0
  Focus of this release was mainly on the optimization of the evaluation speed of PSP. Moreover, the PSP implementation has been extended with operating point output.
 
The following changes and additions have been made to the model:
  • Solved issue with BGIDL (SiMKit-version only).
  • Added parameter FNT in noise model
  • Added shot noise in avalanche current
  • Now PHIT is used in noise model

The following changes and additions have been made to the PSP-NQS model.
  • Solved issue with MULT in parasitic resistances.
  • Added thermal noise to parasitic resistances.
2005/04 Release of MOS Model PSP, level 100.

Code history

MOS Model PSP, level 102

Because the C source files "device_psp1020.c", "device_psp1021.c", "device_psp102e.c", "device_pspnqs1020.c", "device_pspnqs1021.c" and "device_pspnqs102e.c" are generated from the VerilogA description of the PSP model, the relation between the C code revision and the model level is not given. Both the VerilogA description as well as the C implementation can be found in the source code.

2008/01/31 Release of MOS model PSP 102.2.0.
 
  • Code changes
  • See 102.2.2 in the model history above
  • New flexible topology architecture implemented
  • Small improvement in noise implementation for non-correlated noise sources
  • Spectre only: DCmatch implementation for test purposes
  • Spectre only: model group selection feature is supported by the binning model
2007/04/30 Release of MOS Model PSP, level 102, version 2
  Implemented model changes:
  • see release 102.2 in the model history above
2006/07/07 Release of MOS Model PSP, level 102.

MOS Model PSP, level 100

The table below outlines the major changes to the files called "device_psp1000.c" and "device_psp100e.c", which can be found in the source code.

2005/08/03 The global model of PSP level 100.1.0 is identified in the code as revision 1.23. All code differences with the previous version (100.0.1) can be found in this diff file.

The local model of MOS Model PSP level 100.1.0 is identified in the code as revision 1.22. All code differences with the previous version (100.0.1) can be found in this diff file.
  Implemented model changes
  • See release 100.1 in the model history above
Other code changes
  • None
2005/04/11 The global model of PSP level 100.0.1 is identified in the code as revision 1.13.The local model of PSP level 100.0.1 is identified in the code as revision 1.11.
  Release of MOS Model PSP, level 100.

Known bugs

There are no known bugs in MOS Model PSP, level 100, 101 or 102.

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