| Package version | Package name | Package description | Reference codes | Issue date |
|---|---|---|---|---|
| VSSOP8 | plastic very thin shrink small outline package; 8 leads; body width 2.3 mm | MO-187 (JEDEC); | 2002-06-07 |
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- English
SOT765-1
Outline drawing
Documents
- Footprints
- Other documentation
Products in this package
- Interface
- Logic
- 74AHC3GU04 - Inverter
- 74AHC2G00; 74AHCT2G00 - 2-input NAND gate
- 74AHC2G08; 74AHCT2G08 - Dual 2-input AND gate
- 74AHC2G125; 74AHCT2G125 - Bus buffer/line driver; 3-state
- 74AHC2G126; 74AHCT2G126 - Dual buffer/line driver; 3-state
- 74AHC2G241; 74AHCT2G241 - Dual buffer/line driver; 3-state
- 74AHC2G32; 74AHCT2G32 - Dual 2-input OR gate
- 74AHC3G04; 74AHCT3G04 - Inverter
- 74AHC3G14; 74AHCT3G14 - Inverting Schmitt trigger
- 74AUP1G74 - Low-power D-type flip-flop with set and reset; positive-edge trigger
- 74AUP1G885 - Low-power dual function gate
- 74AUP2G00 - Low-power dual 2-input NAND gate
- 74AUP2G02 - Low-power dual 2-input NOR gate
- 74AUP2G08 - Low-power dual 2-input AND gate
- 74AUP2G125 - Low-power dual buffer/line driver; 3-state
- 74AUP2G126 - Low-power dual buffer/line driver; 3-state
- 74AUP2G132 - Low-power dual 2-input NAND Schmitt trigger
- 74AUP2G157 - Low-power 2-input multiplexer
- 74AUP2G240 - Low-power dual inverting buffer/line driver; 3-state
- 74AUP2G241 - Low-power dual buffer/line driver; 3-state
- 74AUP2G32 - Low-power dual 2-input OR gate
- 74AUP2G38 - Low-power dual 2-input NAND gate; open drain
- 74AUP2G79 - Low-power dual D-type flip-flop; positive-edge trigger
- 74AUP2G80 - Low-power dual D-type flip-flop; positive-edge trigger
- 74AUP2G86 - Low-power dual 2-input EXCLUSIVE-OR gate
- 74AUP3G04 - Low-power triple inverter
- 74AVC2T45 - Dual-bit, dual-supply voltage level translator transceiver; 3-state
- 74AVCH2T45 - Dual-bit, dual-supply voltage level translator/transceiver; 3-state
- 74HC3GU04 - Inverter
- 74HC2G00; 74HCT2G00 - Dual 2-input NAND gate
- 74HC2G02; 74HCT2G02 - Dual 2-input NOR gate
- 74HC2G08; 74HCT2G08 - Dual 2-input AND gate
- 74HC2G125; 74HCT2G125 - Dual buffer/line driver; 3-state
- 74HC2G126; 74HCT2G126 - Dual buffer/line driver; 3-state
- 74HC2G32; 74HCT2G32 - Dual 2-input OR gate
- 74HC2G86; 74HCT2G86 - Dual 2-input exclusive-OR gate
- 74HC3G04; 74HCT3G04 - Inverter
- 74HC3G06; 74HCT3G06 - Inverter with open-drain outputs
- 74HC3G07; 74HCT3G07 - Buffer with open-drain outputs
- 74HC3G14; 74HCT3G14 - Inverting Schmitt-triggers
- 74HC3G34; 74HCT3G34 - Triple buffer gate
- 74LVC1G53 - 2-channel analog multiplexer/demultiplexer
- 74LVC1G74 - Single D-type flip-flop with set and reset; positive edge trigger
- 74LVC2G00 - Dual 2-input NAND gate
- 74LVC2G02 - Dual 2-input NOR gate
- 74LVC2G08 - Dual 2-input AND gate
- 74LVC2G125 - Dual bus buffer/line driver; 3-state
- 74LVC2G126 - Dual bus buffer/line driver; 3-state
- 74LVC2G240 - Dual inverting buffer/line driver; 3-state
- 74LVC2G241 - Dual buffer/line driver; 3-state
- 74LVC2G38 - Dual 2-input NAND gate; open drain
- 74LVC2G53 - 2-channel analog multiplexer/demultiplexer
- 74LVC2G66 - Bilateral switch
- 74LVC2G74 - Single D-type flip-flop with set and reset; positive edge trigger
- 74LVC2G86 - Dual 2-input EXCLUSIVE-OR gate
- 74LVC3G04 - Triple inverter
- 74LVC3G06 - Triple inverter with open-drain output
- 74LVC3G07 - Triple buffer with open-drain output
- 74LVC3G14 - Triple inverting Schmitt trigger with 5 V tolerant input
- 74LVC3G17 - Triple non-inverting Schmitt trigger with 5 V tolerant input
- 74LVC3G34 - Triple buffer
- 74LVC3GU04 - Triple inverter
- 74LVCV2G66 - Overvoltage tolerant bilateral switch
- GTL2002 - 2-bit bidirectional low voltage translator
- GTL2012 - 2-bit LVTTL to GTL transceiver
- NX3L2G66 - Low-voltage analog switch
- 74AHC3GU04 - Inverter