| Package version | Package name | Package description | Reference codes | Issue date |
|---|---|---|---|---|
| XQFN8U | plastic extremely thin quad flat package; no leads; 8 terminals; UTLP based; body 1.6 x 1.6 x 0.5 mm | MO-255 (JEDEC); | 2007-11-14 |
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- English
SOT902-1
Outline drawing
Related documents
- Handling precautions
- Mounting and soldering
- Reflow soldering
- Thermal design
Products in this package
- Logic
- 74AUP1G74 - Low-power D-type flip-flop with set and reset; positive-edge trigger
- 74AUP1G885 - Low-power dual function gate
- 74AUP2G00 - Low-power dual 2-input NAND gate
- 74AUP2G02 - Low-power dual 2-input NOR gate
- 74AUP2G08 - Low-power dual 2-input AND gate
- 74AUP2G125 - Low-power dual buffer/line driver; 3-state
- 74AUP2G126 - Low-power dual buffer/line driver; 3-state
- 74AUP2G132 - Low-power dual 2-input NAND Schmitt trigger
- 74AUP2G157 - Low-power 2-input multiplexer
- 74AUP2G240 - Low-power dual inverting buffer/line driver; 3-state
- 74AUP2G241 - Low-power dual buffer/line driver; 3-state
- 74AUP2G32 - Low-power dual 2-input OR gate
- 74AUP2G38 - Low-power dual 2-input NAND gate; open drain
- 74AUP2G79 - Low-power dual D-type flip-flop; positive-edge trigger
- 74AUP2G80 - Low-power dual D-type flip-flop; positive-edge trigger
- 74AUP2G86 - Low-power dual 2-input EXCLUSIVE-OR gate
- 74AUP3G04 - Low-power triple inverter
- 74LVC1G74 - Single D-type flip-flop with set and reset; positive edge trigger
- 74LVC1G99 - Ultra-configurable multiple function gate; 3-state
- 74LVC2G00 - Dual 2-input NAND gate
- 74LVC2G02 - Dual 2-input NOR gate
- 74LVC2G08 - Dual 2-input AND gate
- 74LVC2G125 - Dual bus buffer/line driver; 3-state
- 74LVC2G126 - Dual bus buffer/line driver; 3-state
- 74LVC2G240 - Dual inverting buffer/line driver; 3-state
- 74LVC2G241 - Dual buffer/line driver; 3-state
- 74LVC2G32 - Dual 2-input OR gate
- 74LVC2G38 - Dual 2-input NAND gate; open drain
- 74LVC2G66 - Bilateral switch
- 74LVC2G74 - Single D-type flip-flop with set and reset; positive edge trigger
- 74LVC2G86 - Dual 2-input EXCLUSIVE-OR gate
- 74LVC3G04 - Triple inverter
- 74LVC3G06 - Triple inverter with open-drain output
- 74LVC3G07 - Triple buffer with open-drain output
- 74LVC3G14 - Triple inverting Schmitt trigger with 5 V tolerant input
- 74LVC3G17 - Triple non-inverting Schmitt trigger with 5 V tolerant input
- 74LVC3G34 - Triple buffer
- 74LVC2T45; 74LVCH2T45 - Dual-supply translating transceiver; 3-state
- GTL2002 - 2-bit bidirectional low voltage translator
- NX3L1G53 - Low-ohmic single-pole double-throw analog switch
- NX3L1T53 - Low-ohmic single-pole double-throw analog switch
- NX3L2G384 - Dual low-ohmic single-pole single-throw analog switch
- NX3L2G66 - Dual low-ohmic single-pole single-throw analog switch
- NX3L2T66 - Dual low-ohmic single-pole single-throw analog switch
- PCA9306 - Dual bidirectional I2C-bus and SMBus voltage-level translator
- PCA9509 - Level translating I2C-bus/SMBus repeater
- 74AUP1G74 - Low-power D-type flip-flop with set and reset; positive-edge trigger
- Interface and connectivity