74AHC377; 74AHCT377

General description

The 74AHC377; 74AHCT377 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A.

The 74AHC377; 74AHCT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. A common clock input (CP) loads all flip-flops simultaneously when the data enable input (E) is LOW. The state of each D input, one set-up time before the LOW-to-HIGH clock transition, is transferred to the corresponding output (Qn) of the flip-flop. The E input is only required to be stable one set-up time prior to the LOW-to-HIGH transition for predictable operation.

For versions associated with the 74AHC377; 74AHCT377, refer to the following:

• For the master reset version, see 74AHC273; 74AHCT273
• For the transparent latch version, see 74AHC373; 74AHCT373
• For the 3-state version, see 74AHC374; 74AHCT374

Features

• Balanced propagation delays
• All inputs have Schmitt-trigger actions
• Inputs accept voltages higher than V_CC
• Ideal for addressable register applications
• Data enable for address and data synchronization
• Eight positive-edge triggered D-type flip-flops
• Input levels:
  • For 74AHC377: CMOS level
  • For 74AHCT377: TTL level
• ESD protection:
  • HBM EIA/JESD22-A114E exceeds 2000 V
  • MM EIA/JESD22-A115-A exceeds 200 V
  • CDM EIA/JESD22-C101C exceeds 1000 V
• Multiple package options
• Specified from -40 Cel to +85 Cel and from -40 Cel to +125 Cel

Products/packages

Pricing/ordering/availability

Block diagrams/pinning

Parametrics/similar products

Similar products

74AHC377; 74AHCT377 links to the similar products page containing an overview of products that are similar in function or related to the type number(s) as listed on this page. The similar products page includes products from the same catalog tree(s), relevant selection guides and products from the same functional category.

Print / Email

• Print this information
• Email this information

Disclaimer

The information published on product information pages of the www.nxp.com or www.semiconductors.com websites is an extract from product data sheets and is for information purposes only. For detailed information please check the most recent version of the relevant product data sheet as published on these websites. In the event of any conflict between product information pages and data sheets or deviations from information provided in the product data sheets on these product information pages, the information provided in the product data sheets shall prevail.

The product status of the product(s) described in the product data sheet may have changed since publication of the data sheet and therefore information in datasheets on product status may be outdated. The latest information on product status is published on the product information pages of the above-mentioned websites.

As from October 1st, 2006 Philips Semiconductors has a new trade name - NXP Semiconductors, which will be used in future data sheets together with new contact details. In data sheets where the previous Philips references remain, please use the new links as shown below.

http://www.philips.semiconductors.com use http://www.nxp.com

http://www.semiconductors.philips.com use http://www.nxp.com (Internet)

sales.addresses@www.semiconductors.philips.com use salesaddresses@nxp.com (e-mail)

The copyright notice at the bottom of each page (or elsewhere in the document, depending on the version)
- © Koninklijke Philips Electronics N.V. (year). All rights reserved -
is replaced with:
- © NXP B.V. (year). All rights reserved.-

If you have any questions related to the data sheet, please contact our nearest sales office via e-mail or phone (details via salesaddresses@nxp.com). Thank you for your cooperation and understanding.