NXP Semiconductors


Select site:

English

74ALVCH16823

Selection guide

Datasheet

74ALVCH16823
(Product Specification)
29-Jul-98, 12 pages, 114 kB

Download all documentation

74ALVCH16823 - 18-bit bus-interface D-type flip-flop with reset and enable (3-State)

General description
Features
Products/packages
Quality/reliability/chemical content
Pricing/ordering/availability
Samples
Discontinued information
Applications
Block diagrams/pinning
Design support
Parametrics/similar products
Print/email
Disclaimers
All information hereunder is subject to the subsequent disclaimers

General description

The 74ALVCH16823 is a 18-bit edge-triggered flip-flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus oriented applications. Incorporates bushold data inputs which eliminate the need for external pull-up resistors to hold unused inputs. The74ALVCH16823 consists of two sections of nine edge-triggered flip-flops. A clock (CP) input, an output-enable (OE) input, a Master reset (MR) input and a clock-enable( CE) input are provided for each total 9-bit section.

With the clock-enable (CE) input LOW, the D-type flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH CP transition. Taking CE HIGH disables the clock buffer, thus latching the outputs. Taking the Master reset (MR) input LOW causes all the Q outputs to go LOW independently of the clock.

When OE is LOW, the contents of the flip-flops are available at the outputs. When the OE is HIGH, the outputs go to the high impedance OFF-state. Operation of the OE input does not affect the state of flip-flops.

Active bus hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

Features

  • Wide supply voltage range of 1.2V to 3.6V
  • Complies with JEDEC standard no. 8-1A.
  • CMOS low power consumption
  • Direct interface with TTL levels
  • Current drive ? 24 mA at 3.0 V
  • MultibyteEflow-through standard pin-out architecture
  • Low inductance multiple VCC and GND pins to minimize noise and ground bounce
  • All data inputs have bus hold
  • Output drive capability 50 Ohm transmission lines @ 85°C

Products/packages

Type numberOrderable part numberOrdering code (12NC)Product statusPackagePackingMarkingECCN
74ALVCH16823DGG74ALVCH16823DGG:119352 590 30112Volume productionSOT364-1
(TSSOP56)
TubeStandard Marking
74ALVCH16823DGG74ALVCH16823DGG,119352 590 30118Volume productionSOT364-1
(TSSOP56)
Reel Pack, SMD, 13"Standard Marking
74ALVCH16823DL74ALVCH16823DL,5129352 590 20512Volume productionSOT371-1
(SSOP56)
Tube Dry PackStandard Marking
74ALVCH16823DL74ALVCH16823DL,5189352 590 20518Volume productionSOT371-1
(SSOP56)
Reel Dry Pack, SMD, 13"Standard Marking

Quality/reliability/chemical content

Type numberOrderable part numberChemical contentRoHSLeadfree Conversion dateRHFIRF (FIT)MTBF (hours)MSL
74ALVCH16823DGG74ALVCH16823DGG:1174ALVCH16823DGG
week 2, 2006 3,872,58E+081
74ALVCH16823DGG74ALVCH16823DGG,1174ALVCH16823DGG
week 2, 2006 3,872,58E+081
74ALVCH16823DL74ALVCH16823DL,51274ALVCH16823DL
week 13, 2005 3,872,58E+08NA
74ALVCH16823DL74ALVCH16823DL,51874ALVCH16823DL
week 13, 2005 3,872,58E+08NA

Quality and reliability disclaimer

Pricing/ordering/availability

Type numberOrdering code(12NC)Orderable part numberIndicative price/unit($)RegionDistributorIn stockOrder quantityInventory dateBuy onlineSamples
74ALVCH16823DGG9352 590 30112  74ALVCH16823DGG:11  1.4900      not available
74ALVCH16823DGG9352 590 30118  74ALVCH16823DGG,11  1.4900      Order samples
74ALVCH16823DL9352 590 20512  74ALVCH16823DL,512  1.4900      not available
74ALVCH16823DL9352 590 20518  74ALVCH16823DL,518  1.4900      not available

Block diagrams/pinning

Design support

Application Notes

Parametrics/similar products

Type numberPackageDescriptionFmax(MHz)Propagation Delay(ns)VoltageNo. of PinsPower Dissipation ConsiderationsLogic Switching LevelsOutput Drive Capability
74ALVCH16823DGGSOT364-1
(TSSOP56)
2.5/3.3V 18-Bit D-Type Flip-Flop; Positive-Edge Trigger with Bus Hold (3-State)3502.1@3.3V1.2-3.656Low Power or Battery ApplicationsTTL+/- 24 mA
74ALVCH16823DLSOT371-1
(SSOP56)
2.5/3.3V 18-Bit D-Type Flip-Flop; Positive-Edge Trigger with Bus Hold (3-State)3502.1@3.3V1.2-3.656Low Power or Battery ApplicationsTTL+/- 24 mA


Similar products
74ALVCH16823 links to the similar products page containing an overview of products that are similar in function or related to the type number(s) as listed on this page. The similar products page includes products from the same catalog tree(s), relevant selection guides and products from the same functional category.