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74ALVCH16823
General description
The 74ALVCH16823 is a 18-bit edge-triggered flip-flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus oriented applications. Incorporates bushold data inputs which eliminate the need for external pull-up resistors to hold unused inputs. The74ALVCH16823 consists of two sections of nine edge-triggered flip-flops. A clock (CP) input, an output-enable (OE) input, a Master reset (MR) input and a clock-enable( CE) input are provided for each total 9-bit section.
With the clock-enable (CE) input LOW, the D-type flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH CP transition. Taking CE HIGH disables the clock buffer, thus latching the outputs. Taking the Master reset (MR) input LOW causes all the Q outputs to go LOW independently of the clock.
When OE is LOW, the contents of the flip-flops are available at the outputs. When the OE is HIGH, the outputs go to the high impedance OFF-state. Operation of the OE input does not affect the state of flip-flops.
Active bus hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
Features
- Wide supply voltage range of 1.2V to 3.6V
- Complies with JEDEC standard no. 8-1A.
- CMOS low power consumption
- Direct interface with TTL levels
- Current drive ? 24 mA at 3.0 V
- MultibyteEflow-through standard pin-out architecture
- Low inductance multiple VCC and GND pins to minimize noise and ground bounce
- All data inputs have bus hold
- Output drive capability 50 Ohm transmission lines @ 85°C
Products/packages
| Type number | North American Type number | Ordering code (12NC) | Product status | Package | Packing | Marking | Chemical content | Leadfree conversion date |
|---|---|---|---|---|---|---|---|---|
| 74ALVCH16823DGG | 74ALVCH16823DG | 9352 590 30112 | Volume production | SOT364-1
(TSSOP56) | Tube | Standard Marking | 74ALVCH16823DGG
| week 2, 2006 |
| 74ALVCH16823DGG | 74ALVCH16823DG-T | 9352 590 30118 | Volume production | SOT364-1
(TSSOP56) | Reel Pack, SMD, 13" | Standard Marking | 74ALVCH16823DGG
| week 2, 2006 |
| 74ALVCH16823DL | 74ALVCH16823DL | 9352 590 20512 | Volume production | SOT371-1
(SSOP56) | Tube Dry Pack | Standard Marking | 74ALVCH16823DL
| week 13, 2005 |
| 74ALVCH16823DL | 74ALVCH16823DL-T | 9352 590 20518 | Volume production | SOT371-1
(SSOP56) | Reel Dry Pack, SMD, 13" | Standard Marking | 74ALVCH16823DL
| week 13, 2005 |
Pricing/ordering/availability
| Type number | Ordering code(12NC) | Indicative price/unit($) | Region | Distributor | In stock | Inventory date | Buy online | Samples |
|---|---|---|---|---|---|---|---|---|
| 74ALVCH16823DGG | 9352 590 30112 | 1.4900 | not available | |||||
| 74ALVCH16823DGG | 9352 590 30118 | 1.4900 | Order samples | |||||
| 74ALVCH16823DL | 9352 590 20512 | 1.4900 | not available | |||||
| 74ALVCH16823DL | 9352 590 20518 | 1.4900 | Order samples |
Technical documents
Application Notes
Parametrics/similar products
| Type number | Package | Description | Fmax(MHz) | Propagation Delay(ns) | Voltage | No. of Pins | Power Dissipation Considerations | Logic Switching Levels | Output Drive Capability |
|---|---|---|---|---|---|---|---|---|---|
| 74ALVCH16823DGG | SOT364-1
(TSSOP56) | 2.5/3.3V 18-Bit D-Type Flip-Flop; Positive-Edge Trigger with Bus Hold (3-State) | 350 | 2.1@3.3V | 1.2-3.6 | 56 | Low Power or Battery Applications | TTL | +/- 24 mA |
| 74ALVCH16823DL | SOT371-1
(SSOP56) | 2.5/3.3V 18-Bit D-Type Flip-Flop; Positive-Edge Trigger with Bus Hold (3-State) | 350 | 2.1@3.3V | 1.2-3.6 | 56 | Low Power or Battery Applications | TTL | +/- 24 mA |
Similar products
74ALVCH16823 links to the similar products page containing an overview of products that are similar in function or related to the type number(s) as listed on this page. The similar products page includes products from the same catalog tree(s), relevant selection guides and products from the same functional category.
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