NXP Semiconductors


Select site:

English

74AUP2G00

Selection guide

Datasheet

74AUP2G00
(Product Specification)
05-Jun-08, 17 pages, 489 kB

Download all documentation

74AUP2G00 - Low-power dual 2-input NAND gate

General description
Features
Products/packages
Quality/reliability/chemical content
Pricing/ordering/availability
Samples
Discontinued information
Applications
Block diagrams/pinning
Design support
Parametrics/similar products
Print/email
Disclaimers
All information hereunder is subject to the subsequent disclaimers

General description

The 74AUP2G00 provides the dual 2-input NAND function.

Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.

This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing a damaging backflow current through the device when it is powered down.

Features

  • Wide supply voltage range from 0.8 V to 3.6 V
  • High noise immunity
  • Complies with JEDEC standards:
    • JESD8-12 (0.8 V to 1.3 V)
    • JESD8-11 (0.9 V to 1.65 V)
    • JESD8-7 (1.2 V to 1.95 V)
    • JESD8-5 (1.8 V to 2.7 V)
    • JESD8-B (2.7 V to 3.6 V)
  • ESD protection:
    • HBM JESD22-A114E Class 3A exceeds 5000 V
    • MM JESD22-A115-A exceeds 200 V
    • CDM JESD22-C101C exceeds 1 000 V
  • Low static power consumption; ICC = 0.9 uA (maximum)
  • Latch-up performance exceeds 100 mA per JESD78 Class II
  • Inputs accept voltages up to 3.6 V
  • Low noise overshoot and undershoot < 10 pct of VCC
  • IOFF circuitry provides partial Power-down mode operation
  • Multiple package options
  • Specified from -40 Cel to +85 Cel and -40 Cel to +125 Cel

Products/packages

Type numberOrderable part numberOrdering code (12NC)Product statusPackagePackingMarkingECCN
74AUP2G00DC74AUP2G00DC,1259352 807 06125Volume productionSOT765-1
(VSSOP8)
Reel Pack, Reverse, ReverseStandard Marking
74AUP2G00GD74AUP2G00GD,1259352 868 41125Volume productionSOT996-2
(XSON8U)
Reel Pack, Reverse, ReverseStandard Marking
74AUP2G00GM74AUP2G00GM,1259352 814 23125Volume productionSOT902-1
(XQFN8U)
Reel Pack, Reverse, ReverseStandard Marking
74AUP2G00GT74AUP2G00GT,1159352 807 07115Volume productionSOT833-1
(XSON8U)
Reel Pack, SMD, 7"Standard Marking

Quality/reliability/chemical content

Type numberOrderable part numberChemical contentRoHSLeadfree Conversion dateRHFIRF (FIT)MTBF (hours)MSL
74AUP2G00DC74AUP2G00DC,12574AUP2G00DC
Always Pb-free 3,293,04E+081
74AUP2G00GD74AUP2G00GD,12574AUP2G00GD
Always Pb-free 3,293,04E+081
74AUP2G00GM74AUP2G00GM,12574AUP2G00GM
Always Pb-free 3,293,04E+081
74AUP2G00GT74AUP2G00GT,11574AUP2G00GT
Always Pb-free 3,293,04E+081

Quality and reliability disclaimer

Pricing/ordering/availability

Type numberOrdering code(12NC)Orderable part numberIndicative price/unit($)RegionDistributorIn stockOrder quantityInventory dateBuy onlineSamples
74AUP2G00DC9352 807 06125  74AUP2G00DC,125  0.2600NAFUTURE ELECTRONICS3,000 11/19/2009Buy onlineOrder samples
74AUP2G00GD9352 868 41125  74AUP2G00GD,125        not available
74AUP2G00GM9352 814 23125  74AUP2G00GM,125        not available
74AUP2G00GT9352 807 07115  74AUP2G00GT,115  0.3700      Order samples

Applications


Related applications
Transceiver board
Main CPU board

Block diagrams/pinning

Design support

Application Notes