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74AUP2G241
General description
The 74AUP2G241 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.
This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
The 74AUP2G241 provides a dual non-inverting buffer/line driver with 3-state outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH level at pin 1OE causes output 1Y to assume a high-impedance OFF-state. A LOW level at pin 2OE causes output 2Y to assume a high-impedance OFF-state.
This device has an input-disable feature, which allows floating input signals. The input 1A is disabled when the output enable input 1OE is HIGH. The input 2A is disabled when the output enable input 2OE is LOW.
Features
- Wide supply voltage range from 0.8 V to 3.6 V
- High noise immunity
- Complies with JEDEC standards:
- JESD8-12 (0.8 V to 1.3 V)
- JESD8-11 (0.9 V to 1.65 V)
- JESD8-7 (1.2 V to 1.95 V)
- JESD8-5 (1.8 V to 2.7 V)
- JESD8-B (2.7 V to 3.6 V)
- ESD protection:
- HBM JESD22-A114-D Class 3A exceeds 5000 V
- MM JESD22-A115-A exceeds 200 V
- CDM JESD22-C101-C exceeds 1000 V
- Low static power consumption; ICC = 0.9 uA (maximum)
- Latch-up performance exceeds 100 mA per JESD 78 Class II
- Inputs accept voltages up to 3.6 V
- Low noise overshoot and undershoot < 10 pct of VCC
- Input-disable feature allows floating input conditions
- IOFF circuitry provides partial Power-down mode operation
- Multiple package options
- Specified from -40 Cel to +85 Cel and -40 Cel to +125 Cel
Products/packages
| Type number | North American Type number | Ordering code (12NC) | Product status | Package | Packing | Marking | Chemical content | Leadfree conversion date |
|---|---|---|---|---|---|---|---|---|
| 74AUP2G241DC | 74AUP2G241DC-G | 9352 807 38125 | Volume production | SOT765-1
(VSSOP8) | Reel Pack, Reverse, Reverse | Standard Marking | 74AUP2G241DC
| Always Pb-free |
| 74AUP2G241GM | 74AUP2G241GM-G | 9352 814 38125 | Volume production | SOT902-1
(XQFN8U) | Reel Pack, Reverse, Reverse | Standard Marking | 74AUP2G241GM
| Always Pb-free |
| 74AUP2G241GT | 74AUP2G241GT-G | 9352 807 39115 | Volume production | SOT833-1
(XSON8) | Reel Pack, SMD, 7" | Standard Marking | 74AUP2G241GT
| Always Pb-free |
Pricing/ordering/availability
| Type number | Ordering code(12NC) | Indicative price/unit($) | Region | Distributor | In stock | Inventory date | Buy online | Samples |
|---|---|---|---|---|---|---|---|---|
| 74AUP2G241DC | 9352 807 38125 | Order samples | ||||||
| 74AUP2G241GM | 9352 814 38125 | Order samples | ||||||
| 74AUP2G241GT | 9352 807 39115 | Order samples |
Applications
Related applications
LCD display - discretes focus
PDA - discretes focus
50-60 Hz CRT integrated DTV (TV210D)
Mid-range integrated DTV (TV810)
Intelligent washing machine
Transceiver board
Main CPU board
Cellular phone - MMS functionality
Technical documents
Application Notes
AN10161_2;
PicoGate Logic footprints (30-Oct-02)
Support Documents
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