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Datasheet

74AVC2T45
(Product Specification)
03-Jul-07, 28 pages, 140 kB

Dual-bit, dual-supply voltage level translator/transceiver; 3-state

General description
Features
Products/packages
Chemical content
Pricing/ordering/availability
Samples
Applications
Block diagrams/pinning
Technical documents
Parametrics/similar products
Print/email

General description

The 74AVC2T45 is a dual bit, dual supply transceiver that enables bidirectional level translation. It features two data input-output ports (nA and nB), a direction control input (DIR) and dual supply pins (VCC(A) and VCC(B). Both VCC(A) and VCC(B) can be supplied at any voltage between 0.8 V and 3.6 V making the device suitable for translating between any of the low voltage nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V). Pins nA and DIR are referenced to VCC(A) and pins nB are referenced to VCC(B). A HIGH on DIR allows transmission from nA to nB and a LOW on DIR allows transmission from nB to nA.

The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both A and B are in the high-impedance OFF-state.

Features

  • Wide supply voltage range:
    • VCC(A): 0.8 V to 3.6 V
    • VCC(B): 0.8 V to 3.6 V
  • High noise immunity
  • Complies with JEDEC standards:
    • JESD8-12 (0.8 V to 1.3 V)
    • JESD8-11 (0.9 V to 1.65 V)
    • JESD8-7 (1.2 V to 1.95 V)
    • JESD8-5 (1.8 V to 2.7 V)
    • JESD8-B (2.7 V to 3.6 V)
  • ESD protection:
    • HBM JESD22-A114E Class 3B exceeds 8000 V
    • MM JESD22-A115-A exceeds 200 V
    • CDM JESD22-C101C exceeds 1000 V
  • Maximum data rates:
    • 500 Mbps (1.8 V to 3.3 V translation)
    • 320 Mbps (< 1.8 V to 3.3 V translation)
    • 320 Mbps (translate to 2.5 V or 1.8 V)
    • 280 Mbps (translate to 1.5 V)
    • 240 Mbps (translate to 1.2 V)
  • Suspend mode
  • Latch-up performance exceeds 100 mA per JESD 78 Class II
  • Inputs accept voltages up to 3.6 V
  • Low noise overshoot and undershoot < 10 pct of VCC
  • IOFF circuitry provides partial Power-down mode operation
  • SOT765-1 and SOT833-1 package options
  • Specified from -40 Cel to +85 Cel and -40 Cel to +125 Cel

Products/packages

Type numberNorth American Type numberOrdering code (12NC)Product statusPackagePackingMarkingChemical contentLeadfree conversion date
74AVC2T45DC74AVC2T45DC-G9352 837 16125Volume productionSOT765-1
(VSSOP8)
Reel Pack, Reverse, ReverseStandard Marking74AVC2T45DC
Always Pb-free
74AVC2T45GT74AVC2T45GT-G9352 837 15115Volume productionSOT833-1
(XSON8)
Reel Pack, SMD, 7"Standard Marking74AVC2T45GT
Always Pb-free

Pricing/ordering/availability

Type numberOrdering code(12NC)Indicative price/unit($)RegionDistributorIn stockInventory dateBuy onlineSamples
74AVC2T45DC9352 837  16125  0.3300      Order samples
74AVC2T45GT9352 837  15115        Order samples

Block diagrams/pinning

Technical documents

Application Notes

AN10161_2; PicoGate Logic footprints (30-Oct-02)

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