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74F5074
Datasheet
General description
The 74F5074 is a dual positive edge?triggered D?type featuring individual data, clock, set and reset inputs; also true and complementary outputs.
Set (SDn) and reset (RDn) are asynchronous active low inputs and operate independently of the clock (CPn) input. Data must be stable just one setup time prior to the low?to?high transition of the clock for guaranteed propagation delays.
Clock triggering occurs at a voltage level and is not directly related to the transition time of the positive?going pulse. Following the hold time interval, data at the Dn input may be changed without affecting the levels of the output.
The 74F5074 is designed so that the outputs can never display a metastable state due to setup and hold time violations. If setup time and hold time are violated the propagation delays may be extended beyond the specifications but the outputs will not glitch or display a metastable state. Typical metastability parameters for the 74F5074 are: t@ 135ps and To@ 9.8 X 106 sec where t represents a function of the rate at which a latch in a metastable state resolves that condition and T0 represents a function of the measurement of the propensity of a latch to enter a metastable state.
Features
- Metastable immune characteristics
- Output skew guaranteed less than 1.5ns
- High source current (IOH = 15mA) ideal for clock driver applications
- Pin out compatible with 74F74
- 74F50728 for synchronizing cascaded D?type flip?flop
- See 74F50729 for synchronizing dual D?type flip?flop with edge?triggered set and reset
- See 74F50109 for synchronizing dual J?K positive edge?triggered flip?flop
- Industrial temperature range available (?40°C to +85°C)
Products/packages
| Type number | North American Type number | Ordering code (12NC) | Product status | Package | Packing | Marking | Chemical content | Leadfree conversion date |
|---|---|---|---|---|---|---|---|---|
| N74F5074D | N74F5074D | 9350 076 10602 | Volume production | SOT108-1
(SO14) | Tube (Signetics) | Standard Marking | N74F5074D
| week 5, 2004 |
| N74F5074D | N74F5074D-T | 9350 076 10623 | Volume production | SOT108-1
(SO14) | Reel Pack, SMD, 13" (Signetics) | Standard Marking | N74F5074D
| week 5, 2004 |
| N74F5074N | N74F5074N | 9350 076 00602 | Volume production | SOT27-1
(DIP14) | Tube (Signetics) | Standard Marking | N74F5074N
| Always Pb-free |
Pricing/ordering/availability
| Type number | Ordering code(12NC) | Indicative price/unit($) | Region | Distributor | In stock | Inventory date | Buy online | Samples |
|---|---|---|---|---|---|---|---|---|
| N74F5074D | 9350 076 10602 | 1.7800 | NA | ARROW ELECTRONICS | 640 | 10/8/2008 | Buy online | not available |
| NA | AVNET ELECTRONICS MARKETING | 89 | 10/8/2008 | Buy online | ||||
| NA | DIGI-KEY CORPORATION | 324 | 10/9/2008 | Buy online | ||||
| N74F5074D | 9350 076 10623 | 1.7800 | Order samples | |||||
| N74F5074N | 9350 076 00602 | 1.7800 | NA | DIGI-KEY CORPORATION | 924 | 10/9/2008 | Buy online | Order samples |
Technical documents
Application Notes
AN202_1;
Testing and specifying FAST logic (01-Jun-87)
AN203_2;
Test Fixtures for High Speed Logic (02-Apr-98)
AN216_2;
Arbitration in shared resource systems (18-Jul-88)
Parametrics/similar products
| Type number | Package | Description | Fmax(MHz) | Propagation Delay(ns) | Voltage | No. of Pins | Logic Switching Levels | Output Drive Capability |
|---|---|---|---|---|---|---|---|---|
| N74F5074D | SOT108-1
(SO14) | Synchronizing Dual D-Type Flip-Flop/Clock Driver | 120 | 3.9 | 4.5-5.5 V | 14 | TTL | -15/+20 mA |
| N74F5074N | SOT27-1
(DIP14) | Synchronizing Dual D-Type Flip-Flop/Clock Driver | 120 | 3.9 | 4.5-5.5 V | 14 | TTL | -15/+20 mA |
Similar products
74F5074 links to the similar products page containing an overview of products that are similar in function or related to the type number(s) as listed on this page. The similar products page includes products from the same catalog tree(s), relevant selection guides and products from the same functional category.
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