74F85

General description

The 74F85 is a 4-bit magnitude comparator that can be expanded to almost any length. It compares two 4-bit binary, BCD, or other monotonic codes and presents the three possible magnitude results at the outputs. The 4-bit inputs are weighted (A0?A3) and (B0?B3) where A3 and B3 are the most significant bits. The upper part of the table describes the normal operation under all conditions that will occur in a single device or in a series expansion scheme. In the upper part of the table the three outputs are mutually exclusive. In the lower part of the table, the outputs reflect the feed-forward conditions that exist in the parallel expansion scheme. The expansion inputs I_A>B, and I_A=B and I _A<B are the least significant bit positions. When used for series expansion, the A>B, A=B and A<B outputs of the lease significant word are connected to the corresponding I_A>B, I A=B and I _A<B inputs of the next higher stage. Stages can be added in this manner to any length, but a propagation delay penalty of about 15ns is added with each additional stage. For proper operation, the expansion inputs of the least significant word should be tied as follows: I_A>B = Low, I_A=B = High, and I_A<B = Low.

Features

• High-impedance NPN base inputs for reduced loading (20µA in High and Low states)
• Magnitude comparison of any binary words
• Serial or parallel expansion without extra gating

Block diagrams/pinning

Technical documents

Application Notes

AN2021_1; Thermal considerations for FAST logic products (13-Mar-95)

AN202_1; Testing and specifying FAST logic (01-Jun-87)

AN203_2; Test Fixtures for High Speed Logic (02-Apr-98)

AN216_2; Arbitration in shared resource systems (18-Jul-88)

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