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Datasheet

74HC/HCT107
(Product Specification)
01-Dec-90, 7 pages, 52 kB

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General description

The 74HC/HCT107 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.

The 74HC/HCT107 are dual negative-edge triggered JK-type flip-flops featuring individual J, K, clock (nCP) and reset (nR) inputs; also complementary Q and Q outputs.

The J and K inputs must be stable one set-up time prior to the HIGH-to-LOW clock transition for predictable operation.

The reset (nR) is an asynchronous active LOW input. When LOW, it overrides the clock and data inputs, forcing the Q output LOW and the Q output HIGH.

Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times.

Features

  • Output capability: standard
  • ICC category: flip-flops

Products/packages

Type numberNorth American Type numberOrdering code (12NC)Product statusPackagePackingMarkingChemical contentLeadfree conversion date
74HC107D74HC107D9337 139 20652Volume productionSOT108-1
(SO14)
Bulk Pack, CECCStandard Marking74HC107D
week 5, 2004
74HC107D74HC107D-T9337 139 20653Volume productionSOT108-1
(SO14)
Reel Pack, SMD, 13", CECCStandard Marking74HC107D
week 5, 2004
74HC107DB74HC107DB9351 863 00112Volume productionSOT337-1
(SSOP14)
TubeStandard Marking74HC107DB
week 12, 2005
74HC107DB74HC107DB-T9351 863 00118Volume productionSOT337-1
(SSOP14)
Reel Pack, SMD, 13"Standard Marking74HC107DB
week 12, 2005
74HC107N74HC107N9336 690 20652Volume productionSOT27-1
(DIP14)
Bulk Pack, CECCStandard Marking74HC107N
Always Pb-free
74HC107PW74HC107PW9351 863 10112Volume productionSOT402-1
(TSSOP14)
TubeStandard Marking74HC107PW
week 10, 2005
74HC107PW74HC107PW-T9351 863 10118Volume productionSOT402-1
(TSSOP14)
Reel Pack, SMD, 13"Standard Marking74HC107PW
week 10, 2005
74HCT107D74HCT107D9337 139 30652Volume productionSOT108-1
(SO14)
Bulk Pack, CECCStandard Marking74HCT107D
week 5, 2004
74HCT107D74HCT107D-T9337 139 30653Volume productionSOT108-1
(SO14)
Reel Pack, SMD, 13", CECCStandard Marking74HCT107D
week 5, 2004
74HCT107N74HCT107N9336 691 40652Volume productionSOT27-1
(DIP14)
Bulk Pack, CECCStandard Marking74HCT107N
Always Pb-free

Pricing/ordering/availability

Type numberOrdering code(12NC)Indicative price/unit($)RegionDistributorIn stockInventory dateBuy onlineSamples
74HC107D9337 139  20652  0.1900NAFUTURE ELECTRONICS6509/5/2008 Buy online not available
74HC107D9337 139  20653  0.1900NAARROW ELECTRONICS5,0009/5/2008 Buy online Order samples
   NAAVNET ELECTRONICS MARKETING25,0009/5/2008 Buy online  
74HC107DB9351 863  00112  0.2500NADIGI-KEY CORPORATION1,7199/6/2008 Buy online not available
74HC107DB9351 863  00118  0.2500      Order samples
74HC107N9336 690  20652  0.2500NAARROW ELECTRONICS2449/5/2008 Buy online Order samples
   NAAVNET ELECTRONICS MARKETING1,4369/5/2008 Buy online  
74HC107PW9351 863  10112  0.1900     not available
74HC107PW9351 863  10118  0.1900ASIAWPI25,00009/06/2008 Buy online not available
74HCT107D9337 139  30652  0.1900NADIGI-KEY CORPORATION2059/6/2008 Buy online not available
74HCT107D9337 139  30653  0.1900      Order samples
74HCT107N9336 691  40652  0.2300NAARROW ELECTRONICS1,8759/5/2008 Buy online Order samples
   EUFARNELL1,0839/5/2008 Buy online  
   NANEWARK1,0839/5/2008 Buy online  

Technical documents

Support Documents

Parametrics/similar products

Type numberPackageDescriptionFmax(MHz)Propagation Delay(ns)VoltageNo. of PinsPower Dissipation ConsiderationsLogic Switching LevelsOutput Drive Capability
74HC107DSOT108-1
(SO14)
Dual J-K Flip-Flop with Reset; Negative-Edge Trigger 78 16@5V 2.0-6.0 V 14 Low Power or Battery Applications CMOS +/- 5.2 mA
74HC107DBSOT337-1
(SSOP14)
Dual J-K Flip-Flop with Reset; Negative-Edge Trigger 78 16@5V 2.0-6.0 V 14 Low Power or Battery Applications CMOS +/- 5.2 mA
74HC107NSOT27-1
(DIP14)
Dual J-K Flip-Flop with Reset; Negative-Edge Trigger 78 16@5V 2.0-6.0 V 14 Low Power or Battery Applications CMOS +/- 5.2 mA
74HC107PWSOT402-1
(TSSOP14)
Dual J-K Flip-Flop with Reset; Negative-Edge Trigger 78 16@5V 2.0-6.0 V 14 Low Power or Battery Applications CMOS +/- 5.2 mA
74HCT107DSOT108-1
(SO14)
Dual J-K Flip-Flop with Reset; Negative-Edge Trigger; TTL Enabled 73 16 4.5-5.5V 14 Low Power TTL +/- 4 mA
74HCT107NSOT27-1
(DIP14)
Dual J-K Flip-Flop with Reset; Negative-Edge Trigger; TTL Enabled 73 16 4.5-5.5V 14 Low Power TTL +/- 4 mA

Similar products

74HC/HCT107 links to the similar products page containing an overview of products that are similar in function or related to the type number(s) as listed on this page. The similar products page includes products from the same catalog tree(s), relevant selection guides and products from the same functional category.

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