74HC/HCT377

General description

The 74HC/HCT377 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.

The 74HC/HCT377 have eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. A common clock (CP) input loads all flip-flops simultaneously when the data enable (E) is LOW. The state of each D input, one set-up time before the LOW-to-HIGH clock transition, is transferred to the corresponding output (Q_n) of the flip-flop.

The E input must be stable only one set-up time prior to the LOW-to-HIGH transition for predictable operation.

Features

• Ideal for addressable register applications
• Data enable for address and data synchronization applications
• Eight positive-edge triggered D-type flip-flops
• See '273' for master reset version
• See '373' for transparent latch version
• See '374' for 3-state version
• Output capability: standard
• I_CC category: MSI

Products/packages

Pricing/ordering/availability

Technical documents

Support Documents

HCT_USER_GUIDE; HC/T User Guide (1997-11-01)

75015144; Philips PicoGate and MicroPak packaging options (2005-07-01)

Parametrics/similar products

Similar products

74HC/HCT377 links to the similar products page containing an overview of products that are similar in function or related to the type number(s) as listed on this page. The similar products page includes products from the same catalog tree(s), relevant selection guides and products from the same functional category.

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