74HC4040; 74HCT4040

General description

The 74HC4040; 74HCT4040 are high-speed Si-gate CMOS devices and are pin compatible with the HEF4040B series. They are specified in compliance with JEDEC standard no. 7A.

The 74HC4040; 74HCT4040 are 12-stage binary ripple counters with a clock input (CP), an overriding asynchronous master reset input (MR) and twelve parallel outputs (Q0 to Q11). The counter advances on the HIGH-to-LOW transition of CP.

A HIGH on MR clears all counter stages and forces all outputs LOW, independent of the state of CP.

Each counter stage is a static toggle flip-flop.

Features

• Multiple package options
• Complies with JEDEC standard no. 7A
• ESD protection:
• HBM JESD22-A114-C exceeds 2000 V
• MM JESD22-A115-A exceeds 200 V
• Specified from -40 Cel to +85Cel and from -40 Cel to +125 Cel

Products/packages

Pricing/ordering/availability

Applications

• Frequency dividing circuits
• Time delay circuits
• Control counters

Block diagrams/pinning

Technical documents

Support Documents

HCT_USER_GUIDE; HC/T User Guide (1997-11-01)

Parametrics/similar products

Similar products

74HC4040; 74HCT4040 links to the similar products page containing an overview of products that are similar in function or related to the type number(s) as listed on this page. The similar products page includes products from the same catalog tree(s), relevant selection guides and products from the same functional category.

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