74LVC132A

General description

The 74LVC132A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.

The 74LVC132A provides four 2-input NAND gates with Schmitt trigger inputs. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.

The inputs switch at different points for positive and negative-going signals. The difference between the positive voltage V_T+ and the negative voltage V_T- is defined as the input hysteresis voltage V_H.

Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environment.

Features

• Wide supply voltage range from 2.3 V to 3.6 V
• 5 V tolerant inputs for interfacing with 5 V logic
• CMOS low power consumption
• Direct interface with TTL levels
• Unlimited rise and fall times
• Inputs accept voltages up to 5.5 V
• Complies with JEDEC standard JESD8-B/JESD36
• ESD protection:
• HBM JESD22-A114-D exceeds 2000 V
• MM JESD22-A115-A exceeds 200 V
• CDM JESD22-C101-C exceeds 1000 V
• Specified from -40 Cel to +85 Cel and -40 Cel to +125 Cel

Products/packages

Pricing/ordering/availability

Applications

• Wave and pulse shaper
• Astable multivibrator
• Monostable multivibrator.

Block diagrams/pinning

Technical documents

Application Notes

AN240; Interfacing 3 Volt and 5 Volt Applications (15-Sep-95)

AN263_2; Power considerations when using CMOS and BiCMOS logic devices (05-Feb-02)

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