74LVC1G38

General description

The 74LVC1G38 provides a 2-input NAND function.

Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device as translator in a mixed 3.3 V and 5 V environment.

This device is fully specified for partial power-down applications using I_OFF. The I_OFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

Features

• Wide supply voltage range from 1.65 V to 5.5 V
• 5 V tolerant outputs for interfacing with 5 V logic
• High noise immunity
• Complies with JEDEC standard:
  • JESD8-7 (1.65 V to 1.95 V)
  • JESD8-5 (2.3 V to 2.7 V)
  • JESD8-B/JESD36 (2.7 V to 3.6 V).
• ESD protection:
  • HBM JESD22-A114E exceeds 2000 V
  • MM JESD22-A115-A exceeds 200 V
• +-24 mA output drive (V_CC = 3.0 V)
• CMOS low power consumption
• Open drain outputs
• Latch-up performance exceeds 250 mA
• Direct interface with TTL levels
• Inputs accept voltages up to 5 V
• Multiple package options
• Specified from -40 Cel to +125 Cel.

Products/packages

Pricing/ordering/availability

Applications

Related applications
LCD display - discretes focus
PDA - discretes focus
50-60 Hz CRT integrated DTV (TV210D)
Mid-range integrated DTV (TV810)
Intelligent washing machine
Transceiver board
Main CPU board
Cellular phone - MMS functionality

Block diagrams/pinning

Technical documents

Application Notes

AN10161_2; PicoGate Logic footprints (30-Oct-02)

Support Documents

75014636; Getting more from distribution (2005-02-01)

UM10267_1; PCA9698 demonstration board OM6281 (2008-09-26)

75015144; Philips PicoGate and MicroPak packaging options (2005-07-01)

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