NXP Semiconductors


Select site:

English

74LVC544A

Selection guide

Datasheet

74LVC544A
(Product Specification)
11-May-04, 20 pages, 117 kB

Download all documentation

74LVC544A - Octal D-type registered transceiver; inverting; 3-state

General description
Features
Products/packages
Quality/reliability/chemical content
Pricing/ordering/availability
Samples
Discontinued information
Applications
Block diagrams/pinning
Design support
Parametrics/similar products
Print/email
Disclaimers
All information hereunder is subject to the subsequent disclaimers

General description

The 74LVC544A is a high-performance, low-power, low-voltage, Si-gate CMOS device superior to most advanced CMOS compatible TTL families.

The 74LVC544A is an octal registered inverting transceiver containing two sets of D-type latches for temporary storage of the data flow in either direction. Separate latch enable inputs (LEAB and LEBA) and output enable inputs (OEAB and OEBA) are provided for each register to permit independent control of inputting and outputting in either direction of the data flow.

The 74LVC544A contains eight D-type latches, with separate inputs and controls for each set. For data flow from pins A to B, for example, the A to B enable input (pin EAB) must be LOW in order to enter data from pins A0 to A7 or take data from pins B0 to B7. With pin EAB LOW, a LOW signal on the A to B latch enable input (pin LEAB) makes the A to B latches transparent; a subsequent LOW-to-HIGH transition on pin LEAB puts the A data into the latches where it is stored and the B outputs no longer change with the A inputs. With pins EAB and OEAB both LOW, the 3-state B output buffers are active and display the data present at the outputs of the A latches.

Features

  • 5 V tolerant inputs/outputs for interfacing with 5 V logic
  • Supply voltage range from 1.2 V to 3.6 V
  • Complies with JEDEC standard JESD8-B/JESD36
  • CMOS low-power consumption
  • Direct interface with TTL levels
  • 8-bit octal transceiver with D-type latch
  • Back-to-back registers for storage
  • Separate controls for data flow in each direction
  • Supports partial power-down applications; inputs/outputs are high-impedance when VCC = 0 V
  • ESD protection:
    • HBM EIA/JESD22-A114-B exceeds 2000 V
    • MM EIA/JESD22-A115-A exceeds 200 V.
  • Specified from -40 Cel to +85 Cel and -40 Cel to +125 Cel.

Products/packages

Type numberOrderable part numberOrdering code (12NC)Product statusPackagePackingMarkingECCN
74LVC544AD74LVC544AD,1129352 505 40112Volume productionSOT137TubeStandard Marking
74LVC544AD74LVC544AD,1189352 505 40118Volume productionSOT137Reel Pack, SMD, 13"Standard Marking
74LVC544ADB74LVC544ADB,1129352 505 60112Volume productionSOT340-1
(SSOP24)
TubeStandard Marking
74LVC544ADB74LVC544ADB,1189352 505 60118Volume productionSOT340-1
(SSOP24)
Reel Pack, SMD, 13"Standard Marking
74LVC544APW74LVC544APW,1129352 505 70112Volume productionSOT355-1
(TSSOP24)
TubeStandard Marking
74LVC544APW74LVC544APW,1189352 505 70118Volume productionSOT355-1
(TSSOP24)
Reel Pack, SMD, 13"Standard Marking

Quality/reliability/chemical content

Type numberOrderable part numberChemical contentRoHSLeadfree Conversion dateRHFIRF (FIT)MTBF (hours)MSL
74LVC544AD74LVC544AD,11274LVC544AD
week 13, 2005 3,872,58E+081
74LVC544AD74LVC544AD,11874LVC544AD
week 13, 2005 3,872,58E+081
74LVC544ADB74LVC544ADB,11274LVC544ADB
week 12, 2005 3,872,58E+081
74LVC544ADB74LVC544ADB,11874LVC544ADB
week 12, 2005 3,872,58E+081
74LVC544APW74LVC544APW,11274LVC544APW
week 10, 2005 3,872,58E+081
74LVC544APW74LVC544APW,11874LVC544APW
week 10, 2005 3,872,58E+081

Quality and reliability disclaimer

Pricing/ordering/availability

Type numberOrdering code(12NC)Orderable part numberIndicative price/unit($)RegionDistributorIn stockOrder quantityInventory dateBuy onlineSamples
74LVC544AD9352 505 40112  74LVC544AD,112  0.5900      not available
74LVC544AD9352 505 40118  74LVC544AD,118  0.5900      not available
74LVC544ADB9352 505 60112  74LVC544ADB,112  0.5900      not available
74LVC544ADB9352 505 60118  74LVC544ADB,118  0.5900      not available
74LVC544APW9352 505 70112  74LVC544APW,112  0.5900      not available
74LVC544APW9352 505 70118  74LVC544APW,118  0.5900      not available

Block diagrams/pinning

Parametrics/similar products

Type numberPackageDescriptionPropagation Delay(ns)VoltagePower Dissipation ConsiderationsLogic Switching LevelsOutput Drive Capability
74LVC544ADSOT137
3.3V Latched Transceiver; Inverting (3-State)4.0@3.3V1.2-3.6Low Power or Battery ApplicationsTTL+/- 24 mA
74LVC544ADBSOT340-1
(SSOP24)
3.3V Latched Transceiver; Inverting (3-State)4.0@3.3V1.2-3.6Low Power or Battery ApplicationsTTL+/- 24 mA
74LVC544APWSOT355-1
(TSSOP24)
3.3V Latched Transceiver; Inverting (3-State)4.0@3.3V1.2-3.6Low Power or Battery ApplicationsTTL+/- 24 mA


Similar products
74LVC544A links to the similar products page containing an overview of products that are similar in function or related to the type number(s) as listed on this page. The similar products page includes products from the same catalog tree(s), relevant selection guides and products from the same functional category.