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74LVC646A

Selection guide

Datasheet

74LVC646A
(Product Specification)
29-Jun-04, 24 pages, 131 kB

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74LVC646A - Octal bus transceiver/register; 3-state

General description
Features
Products/packages
Quality/reliability/chemical content
Pricing/ordering/availability
Samples
Discontinued information
Applications
Block diagrams/pinning
Design support
Parametrics/similar products
Print/email
Disclaimers
All information hereunder is subject to the subsequent disclaimers

General description

The 74LVC646A is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.

Inputs can be driven from either 3.3 V or 5 V devices. In 3-state operation, outputs can handle 5 V. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.

The 74LVC646A consists of non-inverting bus transceiver circuits with 3-state outputs, D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the internal registers. Data on the A or B bus will be clocked in the internal registers, as the appropriate clock (CPAB or CPBA) goes to a HIGH logic level. Output enable (OE) and direction (DIR) inputs are provided to control the transceiver function. In the transceiver mode, data present at high-impedance port may be stored in either the A or B register, or in both. With the select source inputs (SAB and SBA) stored and real-time (transparent mode) data can be multiplexed. The direction (DIR) input determines which bus will receive data when OE is active (LOW). In the isolation mode (OE = HIGH), A data may be stored in the B register and/or B data may be stored in the A register. When an output function is disabled, the input function is still enabled and may be used to store and transmit data. Only one of the two buses A or B may be driven at a time.

Features

  • 5 V tolerant inputs/outputs for interfacing with 5 V logic
  • Supply voltage range from 1.2 V to 3.6 V
  • Complies with JEDEC standard JESD8-B/JESD36
  • CMOS low-power consumption
  • Direct interface with TTL levels
  • 8-bit octal transceiver with D-type latch
  • Back-to-back registers for storage
  • Separate controls for data flow in each direction
  • Supports partial power-down applications; inputs/outputs are high-impedance when VCC = 0 V
  • ESD protection:
    • HBM EIA/JESD22-A114-B exceeds 2000 V
    • MM EIA/JESD22-A115-A exceeds 200 V.
  • Specified from -40 Cel to +85Cel and -40 Cel to +125 Cel.

Products/packages

Type numberOrderable part numberOrdering code (12NC)Product statusPackagePackingMarkingECCN
74LVC646AD74LVC646AD,1129352 506 00112Volume productionSOT137TubeStandard Marking
74LVC646AD74LVC646AD,1189352 506 00118Volume productionSOT137Reel Pack, SMD, 13"Standard Marking
74LVC646ADB74LVC646ADB,1129352 505 80112Volume productionSOT340-1
(SSOP24)
TubeStandard Marking
74LVC646ADB74LVC646ADB,1189352 505 80118Volume productionSOT340-1
(SSOP24)
Reel Pack, SMD, 13"Standard Marking
74LVC646APW74LVC646APW,1129352 505 90112Volume productionSOT355-1
(TSSOP24)
TubeStandard Marking
74LVC646APW74LVC646APW,1189352 505 90118Volume productionSOT355-1
(TSSOP24)
Reel Pack, SMD, 13"Standard Marking

Quality/reliability/chemical content

Type numberOrderable part numberChemical contentRoHSLeadfree Conversion dateRHFIRF (FIT)MTBF (hours)MSL
74LVC646AD74LVC646AD,11274LVC646AD
week 13, 2005 3,872,58E+081
74LVC646AD74LVC646AD,11874LVC646AD
week 13, 2005 3,872,58E+081
74LVC646ADB74LVC646ADB,11274LVC646ADB
week 12, 2005 3,872,58E+081
74LVC646ADB74LVC646ADB,11874LVC646ADB
week 12, 2005 3,872,58E+081
74LVC646APW74LVC646APW,11274LVC646APW
week 10, 2005 3,872,58E+081
74LVC646APW74LVC646APW,11874LVC646APW
week 10, 2005 3,872,58E+081

Quality and reliability disclaimer

Pricing/ordering/availability

Type numberOrdering code(12NC)Orderable part numberIndicative price/unit($)RegionDistributorIn stockOrder quantityInventory dateBuy onlineSamples
74LVC646AD9352 506 00112  74LVC646AD,112  0.9100      not available
74LVC646AD9352 506 00118  74LVC646AD,118  0.9100      not available
74LVC646ADB9352 505 80112  74LVC646ADB,112  0.9100      not available
74LVC646ADB9352 505 80118  74LVC646ADB,118  0.9100      not available
74LVC646APW9352 505 90112  74LVC646APW,112  0.9100      not available
74LVC646APW9352 505 90118  74LVC646APW,118  0.9100      not available

Block diagrams/pinning

Parametrics/similar products

Type numberPackageDescriptionFmax(MHz)Propagation Delay(ns)VoltagePower Dissipation ConsiderationsLogic Switching LevelsOutput Drive Capability
74LVC646ADSOT137
3.3V Transceiver/Register (3-State)2503.9@3.3V1.2-3.6Low Power or Battery ApplicationsTTL+/- 24 mA
74LVC646ADBSOT340-1
(SSOP24)
3.3V Transceiver/Register (3-State)2503.9@3.3V1.2-3.6Low Power or Battery ApplicationsTTL+/- 24 mA
74LVC646APWSOT355-1
(TSSOP24)
3.3V Transceiver/Register (3-State)2503.9@3.3V1.2-3.6Low Power or Battery ApplicationsTTL+/- 24 mA


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