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General description

The 74LVT16501A is a high-performance BiCMOS product designed for VCC operation at 3.3 V. This device is an 18-bit universal transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions.

Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock (CPAB and CPBA) inputs.

For A-to-B data flow, the device operates in the transparent mode when LEAB is HIGH. When LEAB is LOW, the A-bus data is latched if CPAB is held at a HIGH or LOW level. If LEAB is LOW, the A-bus data is stored in the latch/flip-flop on the LOW-to-HIGH transition of CPAB. When OEAB is HIGH, the outputs are active. When OEAB is LOW, the outputs are in the high-impedance state.

Data flow for B-to-A is similar to that of A-to-B but uses OEBA, LEBA and CPBA. The output enables are complimentary (OEAB is active HIGH and OEBA is active LOW).

Active bus hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

Features

  • 18-bit bidirectional bus interface
  • 3-state buffers
  • Output capability: +64 mA to -32 mA
  • TTL input and output switching levels
  • Input and output interface capability to systems at 5 V supply
  • Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs
  • Live insertion and extraction permitted
  • Power-up reset
  • Power-up 3-state
  • No bus current loading when output is tied to 5 V bus
  • Positive-edge triggered clock inputs
  • Latch-up protection:
    • JESD78: exceeds 500 mA
  • ESD protection:
    • MIL STD 883, method 3015: exceeds 2000 V
    • Machine model: exceeds 200 V

Products/packages

Type numberNorth American Type numberOrdering code (12NC)Product statusPackagePackingMarkingChemical contentLeadfree conversion date
74LVT16501ADGG74LVT16501ADG-T9352 030 30118Volume productionSOT364-1
(TSSOP56)
Reel Pack, SMD, 13"Standard Marking74LVT16501ADGG
week 2, 2006
74LVT16501ADGG74LVT16501ADG9352 030 30112Volume productionSOT364-1
(TSSOP56)
TubeStandard Marking74LVT16501ADGG
week 2, 2006
74LVT16501ADL74LVT16501ADL9351 948 00512Volume productionSOT371-1
(SSOP56)
Tube Dry PackStandard Marking74LVT16501ADL
week 13, 2005
74LVT16501ADL74LVT16501ADL-T9351 948 00518Volume productionSOT371-1
(SSOP56)
Reel Dry Pack, SMD, 13"Standard Marking74LVT16501ADL
week 13, 2005

Pricing/ordering/availability

Type numberOrdering code(12NC)Indicative price/unit($)RegionDistributorIn stockInventory dateBuy onlineSamples
74LVT16501ADGG9352 030  30118  2.2200      Order samples
74LVT16501ADGG9352 030  30112  2.2200     not available
74LVT16501ADL9351 948  00512  2.2200     not available
74LVT16501ADL9351 948  00518  2.2200      Order samples

Block diagrams/pinning

Technical documents

Application Notes

AN2022; The Behavior Of Integrated Bus Hold Circuits (01-Mar-96)
AN203_2; Test Fixtures for High Speed Logic (02-Apr-98)
AN2301; Simulation Support for Philips' Advanced BiCMOS Products (01-Nov-93)
AN243; LVT (Low Voltage Technology) and ALVT (Advanced LVT) (01-Jan-98)
AN246; Transmission Lines and Terminations with Philips Advanced Logic Families (01-Feb-98)

Parametrics/similar products

Type numberPackageDescriptionFmax(MHz)Propagation Delay(ns)VoltageNo. of PinsLogic Switching LevelsOutput Drive Capability
74LVT16501ADGGSOT364-1
(TSSOP56)
3.3V 18-Bit Universal Bus Transceiver; Positive Edge Trigger Clock with Bus Hold (3-State) 150 1.9@3.3V 2.7-3.6 V 56 TTL -32/+64 mA
74LVT16501ADLSOT371-1
(SSOP56)
3.3V 18-Bit Universal Bus Transceiver; Positive Edge Trigger Clock with Bus Hold (3-State) 150 1.9@3.3V 2.7-3.6 V 56 TTL -32/+64 mA

Similar products

74LVT16501A links to the similar products page containing an overview of products that are similar in function or related to the type number(s) as listed on this page. The similar products page includes products from the same catalog tree(s), relevant selection guides and products from the same functional category.

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