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ADC1415S065/080/105/125

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Datasheet

ADC1415S065/080/105/125
(Objective)
04-Jun-09, 33 pages, 174 kB

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ADC1415S065/080/105/125 - Single 14-bit ADC 65, 80, 105 or 125 Msps with Input Buffer CMOS or LVDS DDR digital outputs

General description
Features
Products/packages
Quality/reliability/chemical content
Pricing/ordering/availability
Samples
Discontinued information
Applications
Block diagrams/pinning
Design support
Parametrics/similar products
Print/email
Disclaimers
All information hereunder is subject to the subsequent disclaimers

General description

The ADC1415S is a single channel 14-bit Analog-to-Digital Converter (ADC) optimized for high dynamic performances and low power consumption at sample rates up to 125 Msps. Pipelined architecture and output error correction ensure the ADC1415S is accurate enough to guarantee zero missing codes over the entire operating range. Supplied from a single 3 V source, it can handle output logic levels from 1.8 V to 3.3 V in CMOS mode, thanks to a separate digital output supply.

The ADC1415S supports the LVDS (Low Voltage Differential Signalling) DDR (Double Data Rate) output standard. An integrated SPI (Serial Peripheral Interface) allows the user to easily configure the ADC.

The device also includes a programmable gain amplifier with a flexible input voltage range. With excellent dynamic performance from the baseband to input frequencies of 170 MHz or more, the ADC1415S is ideal for use in communications, imaging and medical applications - especially in high Intermediate Frequency (IF) applications thanks to the integrated input buffer. The input buffer ensures that the input impedance remains constant and low and the performance consistent over a wide frequency range.

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Features

  • SNR, 73 dB / SFDR, 90 dBc
  • Input bandwidth, 600 MHz
  • Pin compatible with the ADC1410S065/080/105/125
  • Power dissipation, 587 mW at 80 Msps, including analog input buffer
  • Sample rate up to 125 Msps
  • SPI Interface
  • 14-bit pipelined ADC core
  • Duty cycle stabilizer
  • Integrated input buffer
  • Fast OTR detection
  • Flexible input voltage range: 1 V (p-p) to 2 V (p-p) with 6 dB programmable fine gain
  • Offset binary, 2's complement, gray code
  • CMOS or LVDS DDR digital outputs
  • Power-down and Sleep modes
  • INL +-1 LSB, DNL +-0.5 LSB (typical)
  • HVQFN40 package

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Products/packages

Type numberOrderable part numberOrdering code (12NC)Product statusPackagePackingMarkingECCN
ADC1415S125HN/C1ADC1415S125HN/C1,59352 873 11518DevelopmentSOT618-6
(HVQFN40) 		Reel Dry Pack, SMD, 13"Standard Marking 3A001A5A4
ADC1415S125HN/C1ADC1415S125HN,5519352 873 11551DevelopmentSOT618-6
(HVQFN40) 		Tray Dry Pack, Bakeable, SingleStandard Marking 3A001A5A4

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Quality/reliability/chemical content

Type numberOrderable part numberChemical contentRoHSLeadfree Conversion dateRHFIRF (FIT)MTBF (hours)MSL
ADC1415S125HN/C1ADC1415S125HN/C1,5ADC1415S125HN_C1
Always Pb-free
ADC1415S125HN/C1ADC1415S125HN,551ADC1415S125HN_C1
Always Pb-free

Quality and reliability disclaimer

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Pricing/ordering/availability

Type numberOrdering code(12NC)Orderable part numberIndicative price/unit($)RegionDistributorIn stockOrder quantityInventory dateBuy onlineSamples
ADC1415S125HN/C19352 873 11518  ADC1415S125HN/C1,5        Order samples
ADC1415S125HN/C19352 873 11551  ADC1415S125HN,551        not available
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Applications

  • Wireless and wired broadband communications
  • Spectral analysis
  • Portable instrumentation
  • Ultrasound equipment
  • Imaging systems

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