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DAC1005D650

Selection guide

Datasheet

DAC1005D650
(Product Specification)
28-Jul-09, 41 pages, 193 kB

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DAC1005D650 - Dual 10-bit DAC, up to 650 Msps, 2x, 4x and 8x interpolating

General description
Features
Products/packages
Quality/reliability/chemical content
Pricing/ordering/availability
Samples
Discontinued information
Applications
Block diagrams/pinning
Design support
Parametrics/similar products
Print/email
Disclaimers
All information hereunder is subject to the subsequent disclaimers

General description

The DAC1005D650 is a high-speed 10-bit dual-channel Digital-to-Analog Converter (DAC) with selectable 2x, 4x or 8x interpolating filters optimized for multi-carrier wireless transmitters.

Thanks to its digital on-chip modulation, the DAC1005D650 allows the complex I and Q inputs to be converted up from BaseBand (BB) to IF. The mixing frequency is adjusted using a Serial Peripheral Interface (SPI) with a 32-bit Numerically Controlled Oscillator (NCO). The phase is controlled by a 16-bit register.

Two modes of operation are available: separate data ports or a single interleaved high-speed data port. In the Interleaved mode, the input data stream is demultiplexed into its original I and Q data and then latched.

The DAC1005D650 also includes a 2x, 4x and 8x clock multiplier which provides the appropriate internal clocks and an internal regulator to adjust the output full-scale current.

Features

  • Dual 10-bit resolution
  • IMD3: 79 dBc; fs = 640 Msps; fo = 96 MHz
  • 650 Msps maximum update rate
  • SFDR: 75 dBc; fdata = 80 MHz; fs = 640 Msps; fo = 19 MHz; PLL on
  • Selectable 2x, 4x or 8x interpolation filters
  • Typical 0.95 W power dissipation at 4x interpolation
  • Input data rate up to 160 Msps
  • Power-down and Sleep modes
  • Very low noise cap-free integrated PLL
  • Differential scalable output current from 1.6 mA to 20 mA
  • 32-bit programmable NCO frequency
  • On-chip 1.25 V reference
  • Dual-port or Interleaved data modes
  • External analog offset control (10-bit auxiliary DACs)
  • 1.8 V and 3.3 V power supplies
  • Internal digital offset control
  • LVDS compatible clock
  • Inverse (sin x) / x function
  • Twos complement or binary offset data format
  • Fully compatible SPI port
  • 3.3 V CMOS input buffers
  • Industrial temperature range from -40 Cel to +85 Cel

Products/packages

Type numberOrderable part numberOrdering code (12NC)Product statusPackagePackingMarkingECCN
DAC1005D650HW/C1DAC1005D650HW/C1,59352 867 76518Volume productionSOT638-1
(HTQFP100)
Reel Dry Pack, SMD, 13"Standard Marking
DAC1005D650HW/C1DAC1005D650HW/C1:59352 867 76551Volume productionSOT638-1
(HTQFP100)
Tray Dry Pack, Bakeable, SingleStandard Marking

Quality/reliability/chemical content

Type numberOrderable part numberChemical contentRoHSLeadfree Conversion dateRHFIRF (FIT)MTBF (hours)MSL
DAC1005D650HW/C1DAC1005D650HW/C1,5DAC1005D650HW_C1
Always Pb-free
DAC1005D650HW/C1DAC1005D650HW/C1:5DAC1005D650HW_C1
Always Pb-free

Quality and reliability disclaimer

Pricing/ordering/availability

Type numberOrdering code(12NC)Orderable part numberIndicative price/unit($)RegionDistributorIn stockOrder quantityInventory dateBuy onlineSamples
DAC1005D650HW/C19352 867 76518  DAC1005D650HW/C1,5        not available
DAC1005D650HW/C19352 867 76551  DAC1005D650HW/C1:5        not available

Applications

  • Wireless infrastructure: LTE, WiMAX, GSM, CDMA, WCDMA, TD-SCDMA
  • Communication: LMDS/MMDS, point-to-point
  • Direct Digital Synthesis (DDS)
  • Broadband wireless systems
  • Digital radio links
  • Instrumentation
  • Automated Test Equipment (ATE)

Block diagrams/pinning