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GTL2008
Datasheet
General description
The GTL2008 is a customized translator between dual Xeon processors, Platform Health Management, South Bridge and Power Supply LVTTL and GTL signals.
Functionally and footprint identical to the GTL2007, the GTL2008 LVTTL and GTL outputs were changed to put them into a high-impedance state when EN1 and EN2 are LOW, with the exception of 11BO because its normal state is LOW, so it is forced LOW. EN1 and EN2 will remain LOW until VCC is at normal voltage, the other inputs are in valid states and VREF is at its proper voltage to assure that the outputs will remain high-impedance through power-up.
The GTL2008 has the enable function that disables the error output to the monitoring agent for platforms that monitor the individual error conditions from each processor. This enable function can be used so that false error conditions are not passed to the monitoring agent when the system is unexpectedly powered down. This unexpected power-down could be from a power supply overload, a CPU thermal trip, or some other event of which the monitoring agent is unaware.
A typical implementation would be to connect each enable line to the system power good signal or the individual enables to the VRD power good for each processor.
Typically Xeon processors specify a VTT of 1.1 V to 1.2 V, as well as a nominal Vref of 0.73 V to 0.76 V. To allow for future voltage level changes that may extend Vref to 0.63 of VTT (minimum of 0.693 V with VTT of 1.1 V) the GTL2008 allows a minimum Vref of 0.66 V. Characterization results show that there is little DC or AC performance variation between these Vref levels.
Features
- Operates as a GTL to LVTTL sampling receiver or LVTTL to GTL driver
- Operates at GTL-/GTL/GTL+ signal levels
- EN1 and EN2 disable error output
- All LVTTL and GTL outputs are put in a high-impedance state when EN1 and EN2 are LOW
- 3.0 V to 3.6 V operation
- LVTTL I/O not 5 V tolerant
- Series termination on the LVTTL outputs of 30 O
- ESD protection exceeds 2000 V HBM per JESD22-A114, 150 V MM per JESD22-A115, and 1000 V CDM per JESD22-C101
- Latch-up testing is done to JEDEC Standard JESD78 Class II, Level A which exceeds 500 mA
- Package offered: TSSOP28
Products/packages
| Type number | Orderable part number | Ordering code (12NC) | Product status | Package | Packing | Marking | ECCN |
|---|---|---|---|---|---|---|---|
| GTL2008PW | GTL2008PW,112 | 9352 821 67112 | Volume production | SOT361-1
(TSSOP28) | Tube | Standard Marking | |
| GTL2008PW | GTL2008PW,118 | 9352 821 67118 | Volume production | SOT361-1
(TSSOP28) | Reel Pack, SMD, 13" | Standard Marking |
Quality/reliability/chemical content
| Type number | Orderable part number | Chemical content | RoHS | Leadfree Conversion date | RHF | IRF (FIT) | MTBF (hours) | MSL Lead-free |
|---|---|---|---|---|---|---|---|---|
| GTL2008PW | GTL2008PW,112 | GTL2008PW |
| Always Pb-free | ||||
| GTL2008PW | GTL2008PW,118 | GTL2008PW |
| Always Pb-free |
Pricing/ordering/availability
| Type number | Ordering code(12NC) | Orderable part number | Indicative price/unit($) | Region | Distributor | In stock | Order quantity | Inventory date | Buy online | Samples |
|---|---|---|---|---|---|---|---|---|---|---|
| GTL2008PW | 9352 821 67112 | GTL2008PW,112 | 0.8500 | NA | ARROW ELECTRONICS | 118 | 3/18/2010 | Buy online | not available | |
| JAPAN | CHIP ONE STOP | no | 03/19/2010 | Buy online | ||||||
| GTL2008PW | 9352 821 67118 | GTL2008PW,118 | 0.8500 | NA | ARROW ELECTRONICS | 118 | 3/18/2010 | Buy online | not available | |
| JAPAN | CHIP ONE STOP | no | 03/19/2010 | Buy online |
Design support
Application Notes
AN10897;
A guide to designing for ESD and EMC (2010-01-22)AN10216;
I2C manual (2003-03-27)
Support Documents
39340011_jp;
I2C-bus specification (latest version) (2004-06-22)Parametrics/similar products
| Type number | Package | Supply voltage(V) | Application | FUNCTION | Operating temp.(Cel) | # of Bits | TTL Drive(mA) | GTL Drive(mA) | Voltage Translation Range(V) |
|---|---|---|---|---|---|---|---|---|---|
| GTL2008PW | SOT361-1
(TSSOP28) | 3.0~3.6 | Dual Xeon Processor Interface to 3.3V Chipset with power good enable | 12-bit GTL-/GTL/GTL+ to LVTTL translator | -40~85 | 12 | 16 | 15 | 0.5 to 3.6 ~ 3.0 to 5.5 |
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GTL2008
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