ISP1508A; ISP1508B

General description

The ISP1508 is a UTMI+ Low Pin Interface (ULPI) Universal Serial Bus (USB) transceiver that is fully compliant with Universal Serial Bus Specification Rev. 2.0, On-The-Go Supplement to the USB 2.0 Specification Rev. 1.3 and UTMI+ Low Pin Interface (ULPI) Specification Rev. 1.1.

The ISP1508 can transmit and receive USB data at high-speed (480 Mbit/s), full-speed (12 Mbit/s) and low-speed (1.5 Mbit/s), and provides a pin-optimized, physical layer front-end attachment to the USB host, peripheral or OTG controller with Single Data Rate (SDR) or Dual Data Rate (DDR) ULPI interface. The ISP1508 can transparently transmit and receive UART signaling.

It is ideal for use in portable electronic devices, such as mobile phones, digital still cameras, digital video cameras, Personal Digital Assistants (PDAs) and digital audio players. It allows USB Application-Specific Integrated Circuits (ASICs), Programmable Logic Devices (PLDs) or any system chip set to interface with the physical layer of the USB through an 8-pin (DDR) or 12-pin (SDR) synchronous digital interface.

The ISP1508 can interface to devices with digital I/O voltages in the range of 1.4 V to 1.95 V.

The ISP1508 is available in TFBGA36 package.

Features

• Fully complies with:
  • USB: Universal Serial Bus Specification Rev. 2.0
  • OTG: On-The-Go Supplement to the USB 2.0 Specification Rev. 1.3
  • ULPI: UTMI+ Low Pin Interface (ULPI) Specification Rev. 1.1
• Interfaces to USB host, peripheral or OTG cores; optimized for portable devices or system ASICs with built-in ULPI link
• Complete Hi-Speed USB physical front-end solution that supports high-speed (480 Mbit/s), full-speed (12 Mbit/s) and low-speed (1.5 Mbit/s)
  • Integrated 45 Ohm +- 10 pct high-speed termination resistors, 1.5 kOhm +- 5 pct full-speed device pull-up resistor, and 15 kOhm +- 5 pct host termination resistors
  • Integrated parallel-to-serial and serial-to-parallel converters to transmit and receive
  • USB clock and data recovery to receive USB data up to +-500 ppm
  • Insertion of stuff bits during transmit and discarding of stuff bits during receive
  • Non-Return-to-Zero Inverted (NRZI) encoding and decoding
  • Supports bus reset, suspend, resume and high-speed detection handshake (chirp)
• Complete USB OTG physical front-end that supports Host Negotiation Protocol (HNP) and Session Request Protocol (SRP)
  • Supports external charge pump or external V_BUS power switch
  • Complete control over USB termination resistors
  • Data line and V_BUS pulsing session request methods
  • Integrated V_BUS voltage comparators
  • Integrated cable (ID) detector
• Flexible system integration and very low power consumption, optimized for portable devices
  • 3.0 V to 4.5 V power supply input range
  • Internal voltage regulator supplies 2.7 V or 3.3 V and 1.8 V
  • Supports interfacing I/O voltage of 1.4 V to 1.95 V; separate I/O voltage supply pins minimize crosstalk
  • Power-down internal regulators in power-down mode when V_CC(I/O) is not present or the CHIP_SEL pin is not active
  • Typical operating current of 13 mA to 32 mA, depending on the USB speed and bus utilization
  • Typical V_CC power consumption in suspend mode is 70 uA and in power-down mode is 0.5 uA
  • 3-state ULPI interface by the CHIP_SEL pin, allowing bus reuse by other applications
• Highly optimized ULPI-compliant interface
  • 60 MHz, 8-pin or 12-pin interface between the core and the transceiver, including a 4-bit DDR bus or an 8-bit SDR bus
  • DDR or SDR interface selectable by pin
  • Supports 60 MHz output clock configuration
  • Integrated Phase-Locked Loop (PLL) supporting crystal or clock frequencies of 13 MHz, 19.2 MHz, 24 MHz or 26 MHz
  • Crystal or clock frequency selectable by pin
  • Fully programmable ULPI-compliant register set
  • 3-pin or 6-pin full-speed or low-speed serial mode
  • Internal Power-On Reset (POR) circuit
• UART interface:
  • Supports transparent UART signaling on DP and DM for the UART accessory application
  • 2.7 V UART signaling on DP and DM
  • Entering UART mode by register setting
  • Exiting UART mode by asserting STP or by toggling the CHIP_SEL pin
• Full industrial grade operating temperature range from -40 Cel to +85 Cel
• ESD compliance:
  • JESD22-A114D 2 kV contact Human Body Model (HBM)
  • JESD22-A115-A 200 V Machine Model (MM)
  • JESD22-C101C 500 V Charge Device Model (CDM)
  • IEC 61000-4-2 8 kV contact on the DP and DM pins
• Available in small TFBGA36 (3.5 mm x 3.5 mm) Restriction of Hazardous Substances (RoHS) compliant, halogen-free and lead-free package

Products/packages

Pricing/ordering/availability

Applications

• Digital still camera
• Digital TV
• Digital Video Disc (DVD) recorder
• External storage device, for example:
  • Magneto-Optical (MO) drive
  • Optical drive (CD-ROM, CD-RW, CD-DVD)
  • Zip drive
• Mobile phone
• MP3 player
• PDA
• Printer
• Scanner
• Set-Top Box (STB)
• Video camera

Block diagrams/pinning

Technical documents

Application Notes

AN10066_1; Interfacing to the ISP1508 (22-Jan-08)

Support Documents

web; For errata sheet: contact NXP support ()

UM10075_1; ISP1508 Hi-Speed ULPI T&MT eval board (2008-01-22)

75016175; ISP150x, ISP151x, ISP170x ULPI Hi-Speed transceivers product leaflet (2007-11-01)

75015937; NXP USB products (01-Feb-07)

Parametrics/similar products

Similar products

ISP1508A; ISP1508B links to the similar products page containing an overview of products that are similar in function or related to the type number(s) as listed on this page. The similar products page includes products from the same catalog tree(s), relevant selection guides and products from the same functional category.

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