P82B715

General description

The P82B715 is a bipolar IC intended for application in I²C-bus and derivative bus systems. While retaining all the operating modes and features of the I²C-bus it permits extension of the practical separation distance between components on the I²C-bus by buffering both the data (SDA) and the clock (SCL) lines.

The I²C-bus capacitance limit of 400 pF restricts practical communication distances to a few meters. Using one P82B715 at each end of a long cable (connecting Lx/Ly to Lx/Ly) reduces that cable's loading on the linked I²C-buses by a factor of 10 and allows the total system capacitance load (all devices, cable, connectors, and traces or wires connected to the I²C-bus) to be around 3000 pF while the loading on each I²C-bus on the Sx/Sy sides remains below 400 pF. Longer cables or low-cost, general-purpose wiring may be used to link I²C-bus based modules without degrading noise margins. Multiple P82B715s can be connected together, linking their Lx/Ly ports, in a star or multi-point architecture as long as the total capacitance of the system is less than about 3000 pF and each bus at an Sx/Sy connection is well below 400 pF. This configuration, with the master and/or slave devices attached to the Sx/Sy port of each P82B715, has full multi-master communication capability. The P82B715 alone does not support voltage level translation, but it can be simply implemented using low cost transistors when required. There is no restriction on interconnecting the Sx/Sy I/Os, and, because the device output levels are always held within 100 mV of input drive levels, P82B715 is compatible with bus buffers that use voltage level offsets, e.g., PCA9511A, PCA9517, Sx/Sy side of P82B96.

The lower V_OL level and ability to operate with any master, slave or bus buffer is the primary advantage of the using the P82B715 for long distance buses at the disadvantage of not isolating bus capacitance like the P82B96 or PCA9600 are able to do. The primary disadvantage of the P82B96 and PCA9600 is that the static level offset needed to isolate bus capacitance does not allow these devices to operate with other bus buffers with special offset levels or with master/slaves that require a V_IL lower than 0.8 V with noise margin. A proven quick design-in point-to-point/multi-point circuit (Figure 9) is included in Section 8.2 to allow rapid use of the P82B715 along with comparison waveforms so that the designer can clearly see the trade-offs between the P82B715 and the P82B96/PCA9600 and choose the type of device that is best for their application.

Features

• Dual, bidirectional, unity voltage gain buffer with no external directional control required
• Compatible with I²C-bus and its derivatives SMBus, PMBus, DDC, etc.
• Logic signal levels may include (but not exceed) both supply and ground
• Logic signal input voltage levels are output without change and are independent of V_CC
• x10 impedance transformation, but does not change logic voltage levels
• Supply voltage range 3 V to 12 V
• Clock speeds to at least 100 kHz and 400 kHz when other system delays permit
• ESD protection exceeds 2500 V HBM per Mil. Std 883C-3015.7 and 400 V MM per JESD22-A115 (I/Os have diodes to V_CC and GND)
• Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA

Products/packages

Quality/reliability/chemical content

Quality and reliability disclaimer

Pricing/ordering/availability

Applications

• Increase the total connected capacitance of an I²C-bus system to around 3000 pF
• Drive I²C-bus signals over long cables to approximately 50 meters or 3000 pF
• Drives x10 lower impedance bus wiring for improved noise immunity
• Multi-drop distribution of I²C-bus signals using low cost twisted-pair cables
• AdvancedTCA radial IPMB architecture
• Driving 30 mA Fm+ devices from standard 3 mA parts

Related applications
Intelligent washing machine
Transceiver board
Power amplifier board
Main CPU board
LCD TV - MMS functionality

Block diagrams/pinning

Design support

Application Notes

AN10710_1; Features and applications of the P82B715 I2C-bus extender (2008-05-28)

AN255_2; I2C / SMBus Repeaters, Hubs and Expanders (2002-12-19)

AN255_2; I2C / SMBus Repeaters, Hubs and Expanders (2002-12-19)

AN10441_1; Level shifting techniques in I2C-bus design (2007-06-20)

AN444; P82B715 I2C extender on long cables (1993-06-01)

Support Documents

design_con_2003_tecforum_i2c_bus_overview; DesignCon 2003 TecForum I 2 C Bus Overview (2003-01-27)

UM10206_1; I2C Demonstration Board 2005-1 Quick Start Guide (2006-06-13)

UM10204_3; I2C-bus specification and user manual (2007-06-26)

web; IBIS and HSPICE Model ()

75016532; NXP 2-channel I²C-bus repeaters PCA9515x and 5-channel I²C-bus hubs PCA9516x (2008-07-01)

75016527; NXP I²C-bus extender P82B715 in a proven application (2008-05-01)

UM10323_1; PCA9600 demonstration board OM6293 (2008-12-15)

Parametrics/similar products

Similar products
P82B715 links to the similar products page containing an overview of products that are similar in function or related to the type number(s) as listed on this page. The similar products page includes products from the same catalog tree(s), relevant selection guides and products from the same functional category.

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Disclaimers

• General product disclaimer
• Quality and reliability disclaimer