Datasheet
P89LPC9408
(Product Specification)
16-Dec-05, 69 pages, 328 kB
8-bit microcontroller with two-clock 80C51 core 8 kB 3 V byte-erasable flash, 32 segment x 4 LCD driver, 10-bit ADC
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General description
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Features
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Products/packages
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Chemical content
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Pricing/ordering/availability
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Samples
- Applications
- Block diagrams/pinning
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Design support
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Parametrics/similar products
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Print/email
General description
The P89LPC9408 is a multi-chip module consisting of a P89LPC938 single-chip
microcontroller combined with a PCF8576D universal LCD controller in a low-cost 64-pin
package. The LCD controller provides 32 segments and supports from 1 to 4 backplanes.
Display overhead is minimized by an on-chip display RAM with auto-increment
addressing.
Features
Principal features
- 8 kB byte-erasable flash code memory organized into 1 kB sectors and 64-byte pages.
Single-byte erasing allows any byte(s) to be used as non-volatile data storage.
- 256-byte RAM data memory.
- 512-byte customer Data EEPROM on chip allows serialization of devices, storage of
set-up parameters, etc.
- 32 segment x 4 backplane LCD controller supports from 1 to 4 backplanes.
- 8-input multiplexed 10-bit ADC. Two analog comparators with selectable inputs and
reference source.
- Two 16-bit counter/timers (each may be configured to toggle a port output upon timer
overflow or to become a PWM output) and a 23-bit system timer that can also be used
as a Real-Time Clock (RTC).
- Enhanced UART with fractional baud rate generator, break detect, framing error
detection, and automatic address detection; 400 kHz byte-wide I2C-bus
communication port and SPI communication port.
- CCU provides PWM, input capture, and output compare functions.
- High-accuracy internal RC oscillator option allows operation without external oscillator
components. The RC oscillator option is selectable and fine tunable.
- 64-pin LQFP package with 20 microcontroller I/O pins minimum and up to 23
microcontroller I/O pins while using on-chip oscillator and reset options.
Additional features
- 2.4 V to 3.6 V VDD operating range. I/O pins are 5 V tolerant (may be pulled up or
driven to 5.5 V).
- Serial flash In-Circuit Programming (ICP) allows simple production coding with
commercial EPROM programmers. Flash security bits prevent reading of sensitive
application programs.
- A high performance 80C51 CPU provides instruction cycle times of 111 ns to 222 ns
for all instructions except multiply and divide when executing at 18 MHz. This is six
times the performance of the standard 80C51 running at the same clock frequency. A
lower clock frequency for the same performance results in power savings and reduced
EMI.
- Serial flash In-System Programming (ISP) allows coding while the device is mounted
in the end application.
- In-Application Programming (IAP) of the flash code memory. This allows changing the
code in a running application.
- Watchdog timer with separate on-chip oscillator, requiring no external components.
The watchdog prescaler is selectable from eight values.
- Low voltage detect (brownout) allows a graceful system shutdown when power fails.
May optionally be configured as an interrupt.
- Idle and two different power-down reduced power modes. Improved wake-up from
Power-down mode (a LOW interrupt input starts execution). Typical power-down
current is 9 uA typical (total power-down with voltage comparators disabled).
- Active-LOW reset. On-chip power-on reset allows operation without external reset
components. A reset counter and reset glitch suppression circuitry prevent spurious
and incomplete resets. A software reset function is also available.
- Configurable on-chip oscillator with frequency range options selected by user
programmed flash configuration bits. Oscillator options support frequencies from
20 kHz to the maximum operating frequency of 18 MHz.
- Oscillator fail detect. The watchdog timer has a separate fully on-chip oscillator
allowing it to perform an oscillator fail detect function.
- Programmable port output configuration options: quasi-bidirectional, open drain,
push-pull, input-only.
- Port 'input pattern match' detect. Port 0 may generate an interrupt when the value of
the pins match or do not match a programmable pattern.
- LED drive capability (20 mA) on all port pins. A maximum limit is specified for the
entire chip.
- Controlled slew rate port outputs to reduce EMI. Outputs have approximately 10 ns
minimum ramp times.
- Only power and ground connections are required to operate the P89LPC9408 when
internal reset option is selected.
- Four interrupt priority levels.
- Eight keypad interrupt inputs, plus two additional external interrupt inputs.
- Schmitt trigger port inputs.
- Second data pointer.
Products/packages
| P89LPC9408FBD | P89LPC9408FBD,557 | 9352 805 83557 | Volume production | SOT791-1
(LQFP64)
| Tray Dry Pack, Bakeable, Multiple | Standard Marking | P89LPC9408FBD
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Always Pb-free
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Pricing/ordering/availability
Design support
Application Notes
Support Documents
Parametrics/similar products
| Type number | Package | Power supply | RAM(bytes) | System Freq(MHz) | SPECIAL FEATURES | FUNCTION | ADCs | Watchdog timer | I/O pins | Operating temp.(Cel) | Timers | PWMs | Memory Type | Serial Interfaces | External Interrupt | Program Security | Series | No. of Pins | Clock Type | Memory Size(kBits) | Operating Frequency(MHz) | Reset Active Low or High |
| P89LPC9408FBD | SOT791-1
(LQFP64) | 2.4~3.6V | 768 | 0~18 | LPC938 + LCD controller | 8-bit 80C51 uController | 8-ch 10-bit ADC | yes | 26 | -40~85 | 5 x 16-bit | 4-ch CCU | FLASH | UART/I2C/SPI | 3 | yes | LPC900 family | 64 | 2-clk | 8KB | 0~18 | Low |
Similar products
P89LPC9408
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