PCA9510A

General description

The PCA9510A is a hot swappable I²C-bus and SMBus buffer that allows I/O card insertion into a live backplane without corrupting the data and clock buses. Control circuitry prevents the backplane from being connected to the card until a stop command or bus idle occurs on the backplane without bus contention on the card. When the connection is made, the PCA9510A provides bidirectional buffering, keeping the backplane and card capacitances isolated.

The PCA9510A has no rise time accelerator circuitry to prevent interference when there are multiple devices in the same system. The PCA9510A incorporates a digital ENABLE input pin, which enables the device when asserted HIGH and forces the device into a Low current mode when asserted LOW, and an open-drain READY output pin, which indicates that the backplane and card sides are connected together (HIGH) or not (LOW).

During insertion, the PCA9510A SDAIN and SCLIN pins (inputs only) are precharged to 1 V to minimize the current required to charge the parasitic capacitance of the chip.

Remark: The dynamic offset design of the PCA9510A/11A/12A/13A/14A I/O drivers allow them to be connected to another PCA9510A/11A/12A/13A/14A device in series or in parallel and to the A side of the PCA9517. The PCA9510A/11A/12A/13A/14A cannot connect to the static offset I/Os used on the PCA9515/15A/16/16A/18 or PCA9517 B side or P82B96 Sx/y side.

Features

• Bidirectional buffer for SDA and SCL lines increases fanout and prevents SDA and SCL corruption during live board insertion and removal from multi-point backplane systems
• Compatible with I²C-bus Standard mode, I²C-bus Fast mode, and SMBus standards
• Active HIGH ENABLE input
• Active HIGH READY open-drain output
• High-impedance SDAn and SCLn pins for V_CC =0 V
• 1 V precharge on SDAIN and SCLIN inputs
• Supports clock stretching and multiple master arbitration and synchronization
• Operating power supply voltage range: 2.7 V to 5.5 V
• I/Os are not 5.5 V tolerant
• 0 Hz to 400 kHz clock frequency
• ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115, and 1000 V CDM per JESD22-C101
• Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
• Packages offered: SO8, TSSOP8 (MSOP8)

Products/packages

Pricing/ordering/availability

Applications

• cPCI, VME, AdvancedTCA cards and other multi-point backplane cards that are required to be inserted or removed from an operating system

Related applications
LCD display - discretes focus
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Transceiver board
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Main CPU board
LCD TV - MMS functionality

Block diagrams/pinning

Technical documents

Application Notes

AN10441_1; Level shifting techniques in I2C-bus design (20-Jun-07)

AN255_2; I2C / SMBus Repeaters, Hubs and Expanders (19-Dec-02)

Support Documents

75015669; Continuous innovation. Timeless lifespan. (01-Sep-06)

75011212; I2C 2002-1A Evaluation Board Kit (01-Mar-03)

UM10206_1; I2C Demonstration Board 2005-1 Quick Start Guide (13-Jun-06)

UM10204_3; I2C-bus specification and user manual (26-Jun-07)

web; IBIS and HSPICE Model ()

75014395; Your connection to I 2 C,UART,CAN,and USB Connecting with Philips Wired Connectivity (2005-04-01)

Parametrics/similar products

Similar products

PCA9510A links to the similar products page containing an overview of products that are similar in function or related to the type number(s) as listed on this page. The similar products page includes products from the same catalog tree(s), relevant selection guides and products from the same functional category.

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