PCA9545A/45B/45C

General description

The PCA9545A/45B/45C is a quad bidirectional translating switch controlled via the I²C-bus. The SCL/SDA upstream pair fans out to four downstream pairs, or channels. Any individual SCx/SDx channel or combination of channels can be selected, determined by the contents of the programmable control register. Four interrupt inputs, INT0 to INT3, one for each of the downstream pairs, are provided. One interrupt output, INT, acts as an AND of the four interrupt inputs.

An active LOW reset input allows the PCA9545A/45B/45C to recover from a situation where one of the downstream I²C-buses is stuck in a LOW state. Pulling the RESET pin LOW resets the I²C-bus state machine and causes all the channels to be deselected as does the internal power-on reset function.

The pass gates of the switches are constructed such that the V_DD pin can be used to limit the maximum high voltage which will be passed by the PCA9545A/45B/45C. This allows the use of different bus voltages on each pair, so that 1.8 V or 2.5 V or 3.3 V parts can communicate with 5 V parts without any additional protection. External pull-up resistors pull the bus up to the desired voltage level for each channel. All I/O pins are 5 V tolerant.

The PCA9545A, PCA9545B and PCA9545C are identical except for the fixed portion of the slave address.

Features

• 1-of-4 bidirectional translating switches
• I²C-bus interface logic; compatible with SMBus standards
• 4 active LOW interrupt inputs
• Active LOW interrupt output
• Active LOW reset input
• 2 address pins allowing up to 4 devices on the I²C-bus
• Alternate address versions A, B and C allow up to a total of 12 devices on the bus for larger systems or to resolve address conflicts
• Channel selection via I²C-bus, in any combination
• Power-up with all switch channels deselected
• Low R_on switches
• Allows voltage level translation between 1.8 V, 2.5 V, 3.3 V and 5 V buses
• No glitch on power-up
• Supports hot insertion
• Low standby current
• Operating power supply voltage range of 2.3 V to 5.5 V
• 5 V tolerant Inputs
• 0 Hz to 400 kHz clock frequency
• ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115, and 1000 V CDM per JESD22-C101
• Latch-up protection exceeds 100 mA per JESD78
• Three packages offered: SO20, TSSOP20, and HVQFN20

Products/packages

Quality/reliability/chemical content

Quality and reliability disclaimer

Pricing/ordering/availability

Applications

Related applications
Intelligent washing machine

Block diagrams/pinning

Design support

Application Notes

AN10441; Level shifting techniques in I2C-bus design (2007-06-20)

AN262; PCA954X FAMILY OF I²C / SMBus MULTIPLEXERS and SWITCHES (2004-10-01)

Support Documents

UM10206; I2C Demonstration Board 2005-1 Quick Start Guide (2006-06-13)

UM10204; I2C-bus specification and user manual (2007-06-26)

web; IBIS and HSPICE Model ()

75016529; NXP 2-, 4-, and 8-channel I²C/SMBus muxes and switches PCA954x (2008-07-01)

Parametrics/similar products

Similar products
PCA9545A/45B/45C links to the similar products page containing an overview of products that are similar in function or related to the type number(s) as listed on this page. The similar products page includes products from the same catalog tree(s), relevant selection guides and products from the same functional category.

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Disclaimers

• General product disclaimer
• Quality and reliability disclaimer