SAA7108AE; SAA7109AE

General description

The SAA7108AE; SAA7109AE is a new multistandard video decoder and encoder chip, offering high quality video input and TV output processing as required by PC-99 specifications. It enables hardware manufacturers to implement versatile video functions on a significantly reduced printed-circuit board area at very competitive costs.

Separate pins for supply voltages as well as for I²C-bus control and boundary scan test have been provided for the video encoder and decoder sections to ensure both flexible handling and optimized noise behavior.

The video encoder is used to encode PC graphics data at maximum 1280 x 1024 resolution (optionally 1920 x 1080 interlaced) to PAL (50 Hz) or NTSC (60 Hz) video signals. A programmable scaler and anti-flicker filter (maximum 5 lines) ensures properly sized and flicker-free TV display as CVBS or S-video output.

Alternatively, the three Digital-to-Analog Converters (DACs) can output RGB signals together with a TTL composite sync to feed SCART connectors.

When the scaler/interlacer is bypassed, a second VGA monitor can be connected to the RGB outputs and separate H and V-syncs as well, thereby serving as an auxiliary monitor at maximum 1280 x 1024 resolution/60 Hz (PIXCLK < 85 MHz). Alternatively this port can provide Y, P_B and P_R signals for HDTV monitors.

The encoder section includes a sync/clock generator and on-chip DACs.

All inputs intended to interface to the host graphics controller are designed for low-voltage signals down to 1.1 V and up to 3.45 V.

The video decoder, a 9-bit video input processor, is a combination of a 2-channel analog pre-processing circuit including source selection, anti-aliasing filter and Analog-to-Digital Converter (ADC), automatic clamp and gain control, a Clock Generation Circuit (CGC), and a digital multistandard decoder (PAL BGHI, PAL M, PAL N, combination PAL N, NTSC M, NTSC-Japan, NTSC N, NTSC 4.43 and SECAM).

The decoder includes a brightness, contrast and saturation control circuit, a multistandard VBI data slicer and a 27 MHz VBI data bypass. The pure 3.3 V (5 V compatible) CMOS circuit SAA7108AE; SAA7109AE, consisting of an analog front-end and digital video decoder, a digital video encoder and analog back-end, is a highly integrated circuit especially designed for desktop video applications.

The decoder is based on the principle of line-locked clock decoding and is able to decode the color of PAL, SECAM and NTSC signals into ITU-R BT.601 compatible color component values.

The encoder can operate fully independently at its own variable pixel clock, transporting graphics input data, and at the line-locked, single crystal-stable video encoding clock.

As an option, it is possible to slave the video PAL/NTSC encoding to the video decoder clock with the encoder FIFO acting as a buffer to decouple the line-locked decoder clock from the crystal-stable encoder clock.

Features

Video decoder

• Six analog inputs, internal analog source selectors, e.g. 6 x CVBS or (2 x Y/C and 2 x CVBS) or (1 x Y/C and 4 x CVBS)
• Two analog preprocessing channels in differential CMOS style for best S/N performance
• Fully programmable static gain or Automatic Gain Control (AGC) for the selected CVBS or Y/C channel
• Switchable white peak control
• Two built-in analog anti-aliasing filters
• Two 9-bit video CMOS Analog-to-Digital Converters (ADCs), digitized CVBS or Y/C signals are available on the Image Port Data (IPD) port under I²C-bus control
• On-chip clock generator
• Line-locked system clock frequencies
• Digital PLL for horizontal sync processing and clock generation, horizontal and vertical sync detection
• Requires only one crystal (either 24.576 MHz or 32.11 MHz) for all standards
• Automatic detection of 50 Hz and 60 Hz field frequency, and automatic switching between PAL and NTSC standards
• Luminance and chrominance signal processing for PAL BGHI, PAL N, combination PAL N, PAL M, NTSC M, NTSC-Japan, NTSC N, NTSC 4.43 and SECAM
• User programmable luminance peaking or aperture correction
• Cross-color reduction for NTSC by chrominance comb filtering
• PAL delay line for correcting PAL phase errors
• Brightness Contrast Saturation (BCS) and hue control on-chip
• Two multifunctional real-time output pins controlled by the I²C-bus
• Multistandard VBI data slicer decoding World Standard Teletext (WST), North-American Broadcast Text System (NABTS), Closed Caption (CC), Wide Screen Signalling (WSS), Video Programming System (VPS), Vertical Interval Time Code (VITC) variants (EBU/SMPTE) etc.
• Standard ITU 656 Y-C_B -C_R 4 : 2 : 2 format (8-bit) on IPD output bus
• Enhanced ITU 656 output format on IPD output bus containing:
  • Active video
  • Raw CVBS data for INTERCAST applications (27 MHz data rate)
  • Decoded VBI data
• Detection of copy protected input signals according to the Macrovision standard. Can be used to prevent unauthorized recording of pay-TV or video tape signals

Video scaler

• Both up and downscaling
• Conversion to square pixel format
• NTSC to 288 lines (video phone)
• Phase accuracy better than 1/64 pixel or line, horizontally or vertically
• Independent scaling definitions for odd and even fields
• Anti-alias filter for horizontal scaling
• Provides output as:
• Scaled active video
• Raw CVBS data for INTERCAST, WAVE-PHORE, POPCON applications or general VBI data decoding (27 MHz or sample rate converted)
• Local video output for Y-C_B -C_R 4 :2 :2 format (VMI, VIP and ZV)

Video encoder

• Digital PAL/NTSC encoder with integrated high quality scaler and anti-flicker filter for TV output from a PC
• Supports Intel Digital Video Out (DVO) low-voltage interfacing to graphics controller
• 27 MHz crystal-stable subcarrier generation
• Maximum graphics pixel clock 85 MHz at double edged clocking, synthesized on-chip or from external source
• Programmable assignment of clock edge to bytes (in double edged mode)
• Synthesizable pixel clock (PIXCLK) with minimized output jitter, can be used as reference clock for the VGC, as well
• PIXCLK output and bi-phase PIXCLK input (VGC clock loop-through possible)
• Hot-plug detection through dedicated interrupt pin
• Supported VGA resolutions for PAL or NTSC legacy video output up to 1280 x 1024 graphics data at 60 Hz or 50 Hz frame rate
• Supported VGA resolutions for HDTV output up to 1920 x 1080 interlaced graphics data at 60 Hz or 50 Hz frame rate
• Three Digital-to-Analog Converters (DACs) for CVBS (BLUE, C_B ), VBS (GREEN, CVBS) and C (RED, C_R ) at 27 MHz sample rate (signals in parenthesis are optionally selected), all at 10-bit resolution
• Non-interlaced C_B -Y-C_R or RGB input at maximum 4 : 4 : 4 sampling
• Downscaling and upscaling from 50 pct to 400 pct
• Optional interlaced C_B -Y-C_R input of Digital Versatile Disk (DVD) signals
• Optional non-interlaced RGB output to drive second VGA monitor (bypass mode, maximum 85 MHz)
• 3 x 256 bytes RGB Look-Up Table (LUT)
• Support for hardware cursor
• HDTV up to 1920 x 1080 interlaced and 1280 x 720 progressive, including 3-level sync pulses
• Programmable border color of underscan area
• Programmable 5-line anti-flicker filter
• On-chip 27 MHz crystal oscillator (3rd harmonic or fundamental 27 MHz crystal)
• Fast I²C-bus control port (400 kHz)
• Encoder can be master or slave
• Adjustable output levels for the DACs
• Programmable horizontal and vertical input synchronization phase
• Programmable horizontal sync output phase
• Internal Color Bar Generator (CBG)
• Optional support of various Vertical Blanking Interval (VBI) data insertion
• Macrovision Pay-per-View copy protection system rev. 7.01, rev. 6.1 and rev. 1.03 (525p) as option; this applies to the SAA7108AE only.

Common features

• 5 V tolerant digital inputs and I/O ports
• I²C-bus controlled (full read-back ability by an external controller, bit rate up to 400 kbit/s)
• Versatile Power-save modes
• Boundary scan test circuit complies with the "IEEE Std. 1149.b1-1994" (separate ID codes for decoder and encoder)
• LBGA156 package
• Moisture Sensitive Level (MSL): e3

Products/packages

Pricing/ordering/availability

Applications

• Notebook (low-power consumption)
• PCMCIA card application
• AGP based graphics cards
• PC editing
• Image processing
• Video phone applications
• INTERCAST and PC teletext applications
• Security applications
• Hybrid satellite set-top boxes

Block diagrams/pinning

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