SAA7111A

General description

The Enhanced Video Input Processor (EVIP) is a combination of a two-channel analog preprocessing circuit including source selectionanti-aliasing filter and ADCan automatic clamp and gain controla Clock Generation Circuit (CGC)a digital multi-standard decoder (PAL BGHIPAL MPAL NNTSC M NTSC-Japan NTSC N and SECAM)a brightness/contrast/saturation control circuita colour space matrix (see Fig.1) and a 27 MHz VBI-data bypass.

The pure 3.3 V CMOS circuit SAA7111Aanalog front-end and digital video decoderis a highly integrated circuit for desktop video applications. The decoder is based on the principle of line-locked clock decoding and is able to decode the colour of PALSECAM and NTSC signals into CCIR-601 compatible colour component values. The SAA7111A accepts as analog inputs CVBS or S-video (Y/C) from TV or VTR sources. The circuit is I₂C-bus controlled. The SAA7111A then supports several text features as Line 21 data slicing and a high-speed VBI data bypass for Intercast.

Features

• Four analog inputs, internal analog source selectors, e.g. 4 ' CVBS or 2 ' Y/C or (1 ' Y/C and 2 ' CVBS)
• Two analog preprocessing channels
• Fully programmable static gain for the main channels or automatic gain control for the selected CVBS or Y/C channel
• Switchable white peak control
• Two built-in analog anti-aliasing filters
• Two 8-bit video CMOS analog-to-digital converters
• On-chip clock generator
• Line-locked system clock frequencies
• Digital PLL for horizontal-sync processing and clock generation
• Requires only one crystal (24.576 MHz) for all standards
• Horizontal and vertical sync detection
• Automatic detection of 50 and 60 Hz field frequency, and automatic switching between PAL and NTSC standards
• Luminance and chrominance signal processing for PAL BGHI, PAL N, PAL M, NTSC M, NTSC N, NTSC 4.43, NTSC-Japan and SECAM
• User programmable luminance peaking or aperture correction
• Cross-colour reduction for NTSC by chrominance comb filtering
• PAL delay line for correcting PAL phase errors
• Real time status information output (RTCO)
• Brightness Contrast Saturation (BCS) control on-chip
• The YUV (CCIR-601) bus supports a data rate of:
  ? 864 ' f_H= 13.5 MHz for 625 line sources
  ? 858 ' f_H = 13.5 MHz for 525 line sources.
• Data output streams for 16, 12 or 8-bit width with the following formats:
  ? YUV 4 :1 :1 (12-bit)
  ? YUV 4 :2 :2 (16-bit)
  ? YUV 4 :2 :2 (CCIR-656) (8-bit)
  ? RGB (5, 6and 5) (16-bit) with dither
  ? RGB (8, 8and 8) (24-bit) with special application.
• Odd/even field identification by a non interlace CVBS input signal
• Fix level for RGB output format during horizontal blanking
• 720 active samples per line on the YUV bus
• One user programmable general purpose switch on an output pin
• Built-in line-21 text slicer
• A 27 MHz Vertical Blanking Interval (VBI) data bypass programmable by I₂PC-bus for INTERCAST applications
• Power-on control
• Two via I₂PC-bus switchable outputs for the digitized CVBS or Y/C input signals AD1 (7 to 0) and AD2 (7 to 0)
• Chip enable function (reset for the clock generator and power save mode up from chip version 3)
• Compatible with memory-based features (line-locked clock)
• Boundary scan test circuit complies with the ?IEEE Std. 1149.1- 1990? (ID-Code = 0 F111 02 B)
• I₂PC-bus controlled (full read-back ability by an external controller)
• Low power (<0.5 W), low voltage (3.3 V), small package (LQFP64)
• 5 V tolerant digital I/O ports.

Products/packages

Pricing/ordering/availability

Applications

• Desktop/Notebook (PCMCIA) video
• Multimedia
• Digital television
• Image processing
• Video phone
• Intercast.

Related applications
LCD display - discretes focus

Technical documents

Application Notes

AN00084_1; PCI - DVB tuner boards and Windows drivers (14-Dec-00)

AN96053_1; High performance scaler SAA7140A(/B) (14-Mar-03)

AN96054_1; SAA7146 Software development kit (31-May-96)

AN96055_1; Digital video decoder/encoder module system (31-May-96)

AN96059_1; SAA7195A (VMC+) for video capture applications (01-Sep-96)

AN97011_1; Digital video decoder/encoder module system: ENCMOD03 + I2C interfacing (07-Feb-96)

AN98037_1; DPC7146 NetLook Videoconferencing Development Kit (10-Mar-98)

Support Documents

75015904; Digital Video Decoders for general applications (2007-03-03)

75011987; Your Digital Gateway to the Analog World - Decoder (2001-11-01)

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