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Datasheet

SAA7142HL
(Product Specification)
16-Jan-06, 63 pages, 308 kB

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Dual video input processor

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General description

The SAA7142HL is a combination of two stand-alone multi-standard video decoders.

The SAA7142HL is a pure 3.3 V (5 V tolerant inputs and I/Os) Complementary Metal-Oxide Semiconductor (CMOS) circuit and a highly integrated circuit for video surveillance applications. Both video decoders are based on the principle of line-locked clock decoding and are able to decode the color of Phase Alternating Line (PAL), Sequentiel Couleur avec Memoire (SECAM) and National Television Standards Committee (NTSC) signals into "ITU-R BT 601" compatible color component values.

The SAA7142HL accepts as analog inputs in total four Color Video Blanking Signal (CVBS) sources from TV or VTR (two selectable CVBS sources for each decoder).

Each of the video decoders (A and B) contains an analog preprocessing circuit including source selection for two CVBS sources, anti-aliasing filter and Analog-to-Digital Converter (ADC), an automatic clamp and gain control, a Clock Generation Circuit (CGC), a digital multi-standard decoder (PAL, NTSC and SECAM), a Brightness Contrast Saturation (BCS) control circuit, a multi-standard text slicer (see Figure 1) and a 27 MHz Vertical Blanking Interval (VBI) data bypass.

The integrated high-performance multi-standard data slicer supports several VBI data standards:

  • Teletext [World Standard Teletext (WST), Chinese teletext (CCST)] (625 lines)
  • Teletext [US-WST, North American Broadcast Text System (NABTS) and Japanese teletext (MOJI)] (525 lines)
  • Closed caption [Europe, US (line 21)]
  • Wide Screen Signalling (WSS)
  • Video Programming Signal (VPS)
  • Vertical Interval Time Codes (VITC) EBU/SMPTE
  • High-speed VBI data bypass for Intercast application.

The circuit is I2C-bus controlled via an I2C-bus interface. The video decoders share one I2C-bus interface on different I2C-bus slave addresses. Each video decoder of the SAA7142HL uses a register mapping which is compatible to the SAA7113H register mapping.

Features

General

  • Two stand-alone video decoder instances (A and B) with two selectable CVBS video inputs each and digital video outputs
  • Programming register mapping identical to SAA7113H
  • Small package (LQFP128)
  • Requires only one crystal (24.576 MHz) for all standards shared by all video decoder instances
  • CMOS 3.3 V device with 5 V tolerant digital inputs and I/O ports
  • Both decoder instances are I2C-bus controlled and share one I2C-bus interface (full read-back ability by an external controller, bit rate up to 400 kbit/s).

Features of video decoder instances A and B

  • Two analog CVBS inputs with internal analog source selectors
  • One analog preprocessing channel in differential CMOS style with built-in analog anti-aliasing filter
  • Fully programmable static gain or automatic gain control for the selected CVBS channel
  • Switchable white peak control
  • Line-locked system clock frequencies
  • Digital Phase-Locked Loop (PLL) for horizontal sync processing and clock generation, horizontal and vertical sync detection
  • Automatic detection of 50 Hz and 60 Hz field frequency and automatic switching between PAL and NTSC standards
  • Luminance and chrominance signal processing for PAL BGHI, PAL N, combination PAL N, PAL M, NTSC M, NTSC N, NTSC 4.43, NTSC Japan and SECAM
  • User-programmable luminance peaking or aperture correction
  • Cross-color reduction for NTSC by chrominance comb filtering
  • PAL delay line for correcting PAL phase errors
  • Brightness Contrast Saturation (BCS) and hue control on-chip
  • Multi-standard VBI data slicer decoding World Standard Teletext (WST), North American Broadcast Text System (NABTS), closed caption, Wide Screen Signalling (WSS), Video Programming System (VPS), VITC variants (EBU/SMPTE), etc.
  • Standard ITU-R BT 656 Y-CB -CR 4 :2 :2format(8-bit) on Video Parallel Output (VPO) bus
  • Enhanced ITU-R BT 656 output format on VPO-bus containing:
    • Active video
    • Decoded VBI data
  • Boundary scan test circuit complies with the "IEEE Std. 1149.b1 - 1994".

Applications

  • Surveillance application.


Related applications
LCD display - discretes focus

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