SAA7715H

General description

The SAA7715 is a cost effective and powerful high performance 24-bit programmable DSP for a variety of digital audio applications. This DSP device integrates a 24-bit DSP core with programmable memories (program RAM/ROM, data and coefficient RAM), 4 digital serial inputs, 4 digital serial outputs, 2 separate SPDIF receivers, a stereo FSDAC, a standard Philips I²C-bus interface, a phase-locked loop for the DSP clock generation and a second phase-locked loop for system clock generation (internal and external DAC clocks).

The SAA7715 can be configured for various audio applications by downloading the dedicated DSP program code into the DSP program RAM or using the ROM or a combination of both. During the ?Power-down mode? the contents of the memories and all other settings will keep their values. The SAA7715 can be initialized using the I²C-bus interface.

Several system application examples, based on this existing SAA7715, are available for a wide range of audio applications (e.g car radio DSP, DVD post-processing, Dolby Pro Logic, PC/USB audio and more) which can be used as a reference design for customers.

Features

Hardware

• 24-bit Philips 70 MIPS DSP core (24-bit data path and 12/24-bit coefficient path)
• 1.5 kbyte of downloadable DSP program memory (PRAM)
• 2 kbyte of DSP program memory (PROM)
• 2.5 kbyte of re-programmable DSP data memory (XRAM)
• 512 byte of re-programmable DSP coefficient memory (YRAM)
• Four stereo digital serial inputs (8 channels) with common BCK and WS. To these inputs the I 2 S-bus format or LSB-justified formats can be applied
• One stereo bitstream DAC (2 channels) with 64 fold oversampling and noise shaping
• Selectable clock output (pin SYSCLK) for external slave devices (512f_s to 128f_s )
• Four stereo digital serial outputs (8 channels) with selectable I²S-bus or LSB-justified format
• Two SPDIF inputs combined with digital serial input
• On-board WS_PLL generates clock for on-board DAC and output pin SYSCLK
• I²C-bus controlled (including fast mode)
• Programmable Phase-Locked Loop (PLL) derives the clock for the DSP from the CLK_IN input
• -40 to +85 Cel operating temperature range
• supply voltage only 3.3 V
• All digital inputs are tolerant for 5 V input levels
• Power-down mode for low current consumption in standby mode
• Optimized pinning for applications with other Philips DACs (such as UDA1334, UDA1355 and UDA1328).

Possible firmware

• Dolby®⁽¹⁾ Pro Logic decoding
• Smoothed volume control (without zipper noise)
• Automatic Volume Levelling (AVL)
• Dynamic bass enhancement
• Ultra bass
• surround
• Incredible mono (Imono)
• DPL virtualiser
• Dolby digital virtualiser (DVD post-processing)
• Dynamic compressor
• Spectral enhancer
• Equalizer with peaking/shelving filters
• DC filters
• Bass/treble control
• Dynamic loudness
• Tone/noise generator
• Graphical spectrum analyser
• Configurable Delay Unit (DLU)
• Sound steering/elevation for CAR applications
• Sample Rate Conversion (SRC).

⁽¹⁾ Dolby - Available only to licensees of Dolby Laboratories Licensing Corporation, San Francisco, CA94111, USA, from whom licensing and application information must be obtained. Dolby is a registered trade-mark of Dolby Laboratories Licensing Corporation.

Applications

• As co-processor for a car radio DSP in a car radio application for additional acoustic enhancements (sound steering/sound elevation/signal processing)
• Multichannel audio: in DVD and Home theatre applications as post-processing device like signal virtualisation (virtual 3D surround) and acoustic enhancement, tone control, volume control and equalizers
• Multichannel decoding: Dolby Pro Logic and virtual 3D surround
• PC/USB audio applications: stereo widening (Incredible surround), sound steering, sound positioning and speaker equalization.

Block diagrams/pinning

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