SAF784X

General description

The SAF784x is a single-chip solution CD audio decoder with on-chip MP3 and WMA decoding, digital servo, audio DAC, sample-rate converter, preamplifier, laser driver and integrated ARM7TDMI-S microprocessor. The device contains all of the required ROM and RAM, including an internal re-programmable Flash ROM, and is targeted at low-cost compressed audio CD applications. The design is a one-chip CD audio decoder IC, with additions to allow low-cost system implementation of MP3 and WMA decoding.

Features

• Channel decoder and digital servo
• 32-bit embedded ARM7 RISC microprocessor supporting both 32-bit and 16-bit ('Thumb') instruction sets
• Maximum ARM operating frequency of 76 MHz, equivalent to 68 MIPS
• Decoding of compressed audio stream (MP3/WMA) on ARM7 core
• All memories required for MP3/WMA decoding embedded on chip: combination of 130 kB mask-programmed internal program ROM (to reduce wait-states on high-speed code, e.g. decompression algorithms), 42 kB boot ROM, 64 kB of internal re-programmable Flash ROM (for simple re-programming of application code) 110 kB internal SRAM
• Programmable clock frequency for ARM microprocessor - allowing users to trade-off power consumption and processing power depending on requirements
• Block decoder hardware to perform C3 error correction
• Sample-rate converter circuit to convert compressed audio sample rates (in the range 8 kHz to 48 kHz) to an output rate of 44.1 kHz
• Microprocessor access to digital representations of the diode input signals from the optical pickup; the microprocessor can also generate the servo output signals RA, FO, SL, allowing the possibility of additional servo algorithms in software
• Programmable PDM outputs (effectively sine and cosine) to allow use of stepper motor for sledge mechanism
• Microprocessor access to audio streams, both from the internal CD decoder and an external stereo auxiliary input (e.g. an analog source from a tuner, converted to digital via on-chip ADCs) to allow audio processing algorithms in the ARM microprocessor, e.g. bass boost, volume control
• Four general-purpose analog inputs (A_IN1 to A_IN4) allowing the ARM microprocessor access to other external analog signals, e.g. low-cost keypad, temperature sensor, via on-chip ADCs
• Two additional analog audio inputs (AUX_L, AUX_R) to allow the ARM microprocessor access to external audio signals (e.g. tuner); allows audio algorithms (e.g. bass boost) to be performed on external audio signals
• Real-time clock operated from separate 32 kHz crystal; allows low-power Standby mode with real-time clock still operational
• Watchdog timer
• I²S-bus, S/PDIF, subcode (V4) and subcode sync outputs
• 32 GPIOs
• Two standard UART channels
• Two external interrupt pins
• I²C-bus interface configurable for master or slave modes, supporting 100 kbit/s and 400 kbit/s standards
• Slave I²S-bus mode, in which the channel decoder can synchronize the CD playback speed to an I²S-bus clock input
• Integrated digital HF/Mirror detector with measurement of minimum and maximum peak values, amplitude and offset
• Integrated CD-text decoder
• Up to 6x decode speed, CLV or CAV modes
• LQFP144 package with 0.5 mm pin pitch
• Separate left and right channel digital silence detection available on KILL pins
• Digital silence detection available on loopback data from external source as well as internal data
• 'Filterless' pseudo bit stream audio DAC with minimal external components
• Stereo line outputs for audio DAC
• Loopback mode allowing the use of integrated DAC with external I²S-bus/EIAJ sources
• Compatible with voltage mode mechanisms
• On-chip buffering and filtering of the diode signals from the mechanism in order to optimize the signals for the decoder and servo parts
• LF (servo) signals converted to digital representations by Sigma-Delta ADCs shared between pairs of channels to minimize DC offset between channels
• HF part summed from signals D1 to D4 and converted to digital signals by HF 6-bit ADC
• Selectable DC offset cancellation of quiescent mechanism voltages and dark currents, digitally controlled; additional fine DC-offset cancellation in digital domain
• Eye pattern monitor system to observe selectable points within the analog pre-amp
• Current and average jitter values available via registers
• On-chip laser power control, up to maximum currents of 120 mA
• Laser on-off control, including 'soft'-start control - zero-to-nominal output power in 1 ms
• Monitor control and feedback circuit to maintain nominal output power throughout laser life
• Configured for Nsub (N-substrate) monitor diode
• JTAG interface for device access and ARM code development (compatible with ARM multi-ICE)
• All digital input pins 5 V tolerant
• Low-latency static memory interface to access a maximum of two 2 MB memory
• This product has been qualified in accordance with AEC-Q100

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Quality and reliability disclaimer

Pricing/ordering/availability

Applications

Reads the following CD-decode formats

• CD-R
• CD-RW
• CD-DA (CD Red Book; IEC 60908)
• CD-ROM (Mode 1 and Mode 2)
• CD-MP3
• CD-WMA
• Video CD
• SACD (CD layer only)
• Support 80 minute to 100 minute CD playback
• Multi-session discs

Parametrics/similar products

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Disclaimers

• General product disclaimer
• Quality and reliability disclaimer