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Datasheet

SC16C2552
(Product Specification)
20-Jun-03, 38 pages, 580 kB

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Dual UART with 16-byte transmit and receive FIFOs

General description
Features
Products/packages
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Samples
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Block diagrams/pinning
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General description

The SC16C2552 is a two channel Universal Asynchronous Receiver and Transmitter (UART) used for serial data communications. Its principal function is to convert parallel data into serial data, and vice versa. The UART can handle serial data rates up to 5 Mbits/s.

The SC16C2552 is pin compatible with the PC16C552 and ST16C2552. It will power-up to be functionally equivalent to the 16C2450. The SC16C2552 provides enhanced UART functions with 16 byte FIFOs, modem control interface, DMA mode data transfer and concurrent writes to control registers of both channels. The DMA mode data transfer is controlled by the FIFO trigger levels and the RXRDY and TXRDY signals. On-board status registers provide the user with error indications and operational status. System interrupts and modem control features may be tailored by software to meet specific user requirements. An internal loop-back capability allows on-board diagnostics. Independent programmable baud rate generators are provided to select transmit and receive baud rates.

The SC16C2552 operates at 5 V, 3.3 V and 2.5 V, and the Industrial temperature range, and is available in a plastic PLCC44 package.

Features

  • Industrial temperature range (-40 Cel to +85 Cel)
  • 5 V, 3.3 V and 2.5 V operation
  • Pin-to-pin and functionally compatible to PC16C552, ST16C2552
  • Software compatible with INS8250, NS16C550
  • Up to 5 Mbits/s data rate at 5 V and 3 V, and 3 Mbits/s at 2.5 V
  • 16-byte transmit FIFO
  • 16-byte receive FIFO with error flags
  • Independent transmit and receive UART control
  • Four selectable Receive FIFO interrupt trigger levels; fixed XMIT FIFO interrupt trigger level
  • Modem control signals (CTS, RTS, DSR, DTR, RI, CD)
  • DMA operation and DMA monitoring via package I/O pins, TXRDY/RXRDY
  • UART internal register sections A and B may be written to concurrently
  • Multi-function output allows more package functions with fewer I/O pins
  • Programmable character lengths (5, 6, 7, 8), with even, odd, or no parity

Block diagrams/pinning

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