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Datasheet

SC16C752
(Product Specification)
20-Jun-03, 47 pages, 604 kB

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Dual UART with 64-byte FIFO

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This product has been discontinued; click here for more information.

General description

The SC16C752 is a dual universal asynchronous receiver/transmitter (UART) with 64-byte FIFOs, automatic hardware/software flow control, and data rates up to 5 Mbits/s (3.3 V and 5 V). The SC16C752 offers enhanced features. It has a transmission control register (TCR) that stores receiver FIFO threshold levels to start/stop transmission during hardware and software flow control. With the FIFO RDY register, the software gets the status of TXRDY/RXRDY for all four ports in one access. On-chip status registers provide the user with error indications, operational status, and modem interface control. System interrupts may be tailored to meet user requirements. An internal loop-back capability allows on-board diagnostics.

The UART transmits data, sent to it over the peripheral 8-bit bus, on the TX signal and receives characters on the RX signal. Characters can be programmed to be 5, 6, 7, or 8 bits. The UART has a 64-byte receive FIFO and transmit FIFO and can be programmed to interrupt at different trigger levels. The UART generates its own desired baud rate based upon a programmable divisor and its input clock. It can transmit even, odd, or no parity and 1, 1.5, or 2 stop bits. The receiver can detect break, idle, or framing errors, FIFO overflow, and parity errors. The transmitter can detect FIFO underflow. The UART also contains a software interface for modem control operations, and has software flow control and hardware flow control capabilities.

The SC16C752 is available in a plastic LQFP48 package.

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Features

  • Pin compatible with SC16C2550 with additional enhancements
  • Up to 5 Mbits/s baud rate (at 3.3 V and 5 V; at 2.5 V maximum baud rate is 3 Mbits/s)
  • 64-byte transmit FIFO
  • 64-byte receive FIFO with error flags
  • Programmable and selectable transmit and receive FIFO trigger levels for DMA and interrupt generation
  • Software/hardware flow control
    • Programmable Xon/Xoff characters
    • Programmable auto-RTS and auto-CTS
  • Optional data flow resume by Xon any character
  • DMA signalling capability for both received and transmitted data
  • Supports 5 V, 3.3 V and 2.5 V operation
  • Software selectable baud rate generator
  • Prescaler provides additional divide-by-4 function
  • Fast databus access time
  • Programmable sleep mode
  • Programmable serial interface characteristics
    • 5, 6, 7, or 8-bit characters
    • Even, odd, or no parity bit generation and detection
    • 1, 1.5, or 2 stop bit generation
  • False start bit detection
  • Complete status reporting capabilities in both normal and sleep mode
  • Line break generation and detection
  • Internal test and loop-back capabilities
  • Fully prioritized interrupt system controls
  • Modem control functions (CTS, RTS, DSR, DTR, RI, and CD).

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Block diagrams/pinning

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