TDA19978A

General description

The TDA19978A is a four inputs HDMI 1.3a compliant receiver with embedded EDID memory.

The TDA19978A embeds an auto adaptive equalizer to improve the signal quality and to allow the use of a large range of cables (up to 25 m, laboratory tested, contact NXP Semiconductors for more details).

The HDCP keys set is stored in a non-volatile embedded memory for maximal security. Software drivers are delivered with the IC to ease configuration and use.

The TDA19978A supports:

• Deep Color mode 10-bit and 12-bit up to 1920 x 1080p at 50/60 Hz
• WUXGA (1920 x 1200p at 60 Hz) reduced blanking format in Deep Color mode 10-bit and 12-bit
• TV resolutions from 480i (1440 x 480i at 60 Hz) and 576i (1440 x 576i at 50 Hz) to HDTV (up to 1920 x 1080p at 50/60 Hz)
• WUXGA (1920 x 1200p at 60 Hz) reduced blanking format
• PC resolutions from VGA (640 x 480p at 60 Hz) to UXGA (1600 x 1200p at 60 Hz)
• IEC 60958/IEC 61937, One Bit Audio (SACD), DST (compressed DSD) and HBR stream
• Gamut boundary description

The TDA19978A includes:

• An improved audio clock generation (an external reference clock is used)
• An improved system for an accurate recognition of PC and TV formats
• The generation of a 128/256/512 x f_s system clock allowing the use of simple audio DACs without integrated PLL, such as UDA1334BTS

Embedded oscillator (an external crystal can be used).

The TDA19978A converts a HDMI stream with or without HDCP into RGB or YC_BC_R digital signal.

The YC_BC_R digital output signal can be 4:4:4 or 4:2:2 semi-planar format following the ITU-R BT.601 standard or 4:2:2 ITU-R BT.656 format.

The TDA19978A can adjust the timing of the video port (t_su(o) and t_h(o)).

All settings are controllable via the I²C-bus.

Features

• Compliant with HDMI 1.3a, DVI 1.0, CEA-861-D and HDCP 1.2 standards
• Quad independent HDMI inputs, up to 235 MHz (HDMI frequency)
• Embedded auto adaptive equalizer on HDMI links
• Embedded volatile EDID memory (253 shared bytes and three bytes dedicated per HDMI input) for zero, one, two, three or four HDMI inputs
• Support color depth processing (8-bit, 10-bit or 12-bit per color)
• Receive color Gamut Metadata Packet with interrupt on each update and readable on I²C-bus
• Up to four S/PDIF or I²S-bus outputs (eight channels) with a sampling rate up to 192 kHz with IEC 60958/IEC 61937 stream
• Support HBR audio stream up to 768 kHz with four demultiplexed S/PDIF or I²S-bus outputs
• Support HBR streams (e.g. DTS-HD master audio and Dolby TrueHD up to eight channels thanks to HBR packet for stream with a frame rate up to 768 kHz)
• Support DSD and DST audio stream up to six DSD channels output for SACD (support DST Audio Packet)
• Channel status decoder supporting multi-channels reception
• Improved audio clock generation using an external reference clock.
• Included system/master clock output (128/256/512 x f_s) allowing to use the UDA1334BTS
• HDMI interface support all HDTV formats (up to 1920 x 1080p at 50/60 Hz) and up to UXGA (1600 x 1200p at 60 Hz) for PC's formats (WUXGA (1920 x 1200p at 60 Hz) reduced blanking supported)
• Embedded oscillator (an external crystal can be used)
• Frame and field detection for interlaced video signal
• Sync timing measurements for format recognition
• Improved system for measurements of blanking and video active area which allows an accurate recognition of PC and TV formats
• HDCP with repeater capability
• Embedded non-volatile memory to store HDCP keys
• Programmable color space conversion of RGB or YC_BC_R input signal into YC_BC_R or RGB
• Output format RGB 4:4:4, YC_BC_R 4:4:4, YC_BC_R 4:2:2 semi-planar following the ITU-R BT.601 standard or YC_BC_R 4:2:2 ITU-R BT.656
• 8-bit, 10-bit or 12-bit output formats (up to 10-bit only in 4:4:4 format) selectable via the I²C-bus
• Adjustable timing of video port (t_su(o) and t_h(o)) via the I²C-bus
• Integrated downsampling-by-two with selectable filters on C_B and C_R channels for 4:2:2 mode
• Internal video and audio pattern generator
• Controllable via the I²C-bus; 5 V tolerant and bit rate up to 400 kbit/s
• DDC inputs 5 V tolerant and bit rate up to 400 kbit/s
• LV-TTL outputs
• Power-down mode
• CMOS process
• 1.8 V and 3.3 V power supplies
• Lead-free HLQFP144 package

Products/packages

Pricing/ordering/availability

Applications

• HDTV
• YC_BC_R or RGB high-speed video digitizer
• Projector, plasma and LCD TV
• Rear projection TV
• High-end TV
• Home theater amplifier
• DVD recorder
• AVR and HDMI splitter

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