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TDA6502; TDA6502A; TDA6503; TDA6503A
General description
The TDA6502, TDA6502A, TDA6503 and TDA6503A are programmable 2-band mixers/oscillators and synthesizers intended for VHF/UHF TV and VCR tuners .
Partitioning of the bands is up to the customer as long as VHF is below 500 MHz and UHF is below 900 MHz.
The devices include two double balanced mixers and two oscillators for the VHF and UHF band respectively, an IF amplifier and a PLL synthesizer. The VHF band can be split-up into two sub-bands using a proper oscillator application and a switchable inductor.
Two pins are available between the mixer output and the IF amplifier input to enable IF filtering for improved signal handling.
The port register provides four PMOS ports. Band selection is provided by port register UHF. When port register UHF is ?on?, the UHF mixer-oscillator is active and the VHF band is switched off. When port register UHF is ?off?, the VHF mixer-oscillator is active and the UHF band is off. Port registers VHFL and VHFH are used to select the VHF sub-bands. Port register FMST is a general purpose port, that can be used to switch an FM sound trap. When the ports are used, the sum of the drain currents has to be limited to 30 mA.
The synthesizer consists of a 15-bit programmable divider, a crystal oscillator and its programmable reference divider and a phase comparator (phase/frequency detector) combined with a charge pump which drives the tuning amplifier, including the 33 V output at pin VT. Depending on the reference divider ratio (64, 80 or 128), the phase comparator operates at 62.5, 50 or 31.25 kHz with a 4 MHz crystal.
Depending on the voltage applied to pin SW the device is operating in the I²C-bus mode or 3-wire bus mode.
In the 3-wire bus mode, pin LOCK/ADC is the ?lock? output of the PLL and is at LOW level when the PLL is locked. Lock detector bit FL of the status byte is set to logic 1 when the loop is locked and is read on the SDA line during a READ operation in I²C-bus mode only.
In the I²C-bus mode only, pin LOCK/ADC is the ADC input for digital AFC control. The ADC code is read during a READ operation on the I²C-bus.
In the test mode, in both I²C-bus mode and 3-wire bus mode, pin LOCK/ADC is used as a test output for fREF and ½fDIV .
I²C-bus format
Five serial bytes (including the address byte) are required to address the device, select the VCO frequency, program the four ports, set the charge pump current and set the reference divider ratio. The device has four independent I²C-bus addresses which can be selected by applying a specific voltage to pin CE/AS.
3-wire bus format
Data is transmitted to the device during a HIGH level on pin CE/AS (enable line). The device is accessible with 18-bit and 19-bit data formats . The first four bits are used to program the PMOS ports and the remaining bits control the programmable divider. A 27-bit data format may also be used to set the charge pump current, the reference divider ratio and the test modes.
It is not allowed to address the device with words whose length is different from 18, 19 or 27 bits.
Features
- Single-chip 5 V mixer/oscillator and synthesizer for cable TV and VCR tuners
- Pin-to-pin compatible with TDA6402, TDA6402A, TDA6403 and TDA6403A
- Universal bus protocol (I²C-bus or 3-wire bus):
- Bus protocol for 18 or 19-bit transmission (3-wire bus)
- Extra protocol for 27-bit transmission (test modes and features for 3-wire bus)
- Address + 4 data bytes transmission (I²C-bus ?write? mode)
- Address + 1 status byte (I²C-bus ?read? mode)
- 4 independent I²C-bus addresses.
- 1 PMOS buffer for UHF band selection (25 mA)
- 3 PMOS buffers for general purpose, e.g. 2 VHF sub-bands, FM sound trap (25 mA)
- 33 V tuning voltage output
- In-lock detector
- 5-step analog-to-digital converter (3 bits in I²C-bus mode)
- 15-bit programmable divider
- Programmable reference divider ratio (64, 80 or 128)
- Programmable charge pump current (60 or 280 mA)
- Varicap drive disable
- Balanced mixer with a common emitter input for VHF (single input)
- Balanced mixer with a common base input for UHF (balanced input)
- 2-pin common emitter oscillator for VHF
- 4-pin common emitter oscillator for UHF
- IF preamplifier with asymmetrical 75 Ohm output impedance able to drive loads from 75 Ohm upwards
- Low power
- Low radiation
- Small size
- The TDA6502A and TDA6503A differ from the TDA6502 and TDA6503 by the UHF port protocol in the I²C-bus mode .
Applications
- Cable tuners for TV and VCR (switched concept for VHF).
Related applications
50-60 Hz CRT integrated DTV (TV210D)
PCI analog stereo TV receiver
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