
ADC1210S125HN
Single 12-bit ADC 125 Msps CMOS or LVDS DDR digital outputs
The ADC1210S is a single-channel 12-bit Analog-to-Digital Converter optimized for high dynamic performances and low power consumption. Pipelined architecture and output error correction ensure the ADC1210S is accurate enough to guarantee zero missing codes over the entire operating range. Supplied from a single 3 V source, it can handle output logic levels from 1.8 V to 3.3 V in CMOS mode, by a separate digital output supply. It supports the LVDS DDR output standard. An integrated SPI allows the user to easily configure the ADC. The device also includes a SPI programmable full-scale to allow flexible input voltage range from 1 V to 2 V (peak-to-peak). With excellent dynamic performance from the baseband to input frequencies of 170 MHz or more.


ADC1210S125ADC1210S125 demo board; both CMOS and LVDS
ADC1210S125F1ADC1210S125F1 Demo Board
ADC1210S125F2ADC1210S125F2 demoboard
| Symbol | Parameter | Conditions | Min | Typ/Nom | Max | Unit |
|---|---|---|---|---|---|---|
| Static characteristics | ||||||
| VDDA | analog supply voltage | 2.85 | 3 | 3.4 | V | |
| VDDO | output supply voltage | CMOS mode | 1.65 | 1.8 | 3.6 | V |
| IDDO | output supply current | 16 | mA | |||
| Ptot | total power dissipation | VDDA = 3 V; VDDO = 1.8 V; analog supply only | 630 | mW | ||
| fs | sampling rate | 125 | Msps | |||
| Nch | number of channels | 1 | ||||
| Nres | resolution | 12 | bit | |||
| SFDR | spurious-free dynamic range | 87 | dBc | |||
| SNR | signal-to-noise ratio | 69.6 | dBFS | |||
| Type number | Orderable part number | Ordering code (12NC) | Product status | Package | Packing | Marking |
|---|---|---|---|---|---|---|
| ADC1210S125HN/C1 | ADC1210S125HN/C1,5 | 9352 890 42518 | Volume production | SOT618-1 (HVQFN40) | Reel Dry Pack, SMD, 13" | Standard Marking |
| ADC1210S125HN/C1 | ADC1210S125HN/C1:5 | 9352 890 42551 | Volume production | SOT618-1 (HVQFN40) | Tray Dry Pack, Bakeable, Single | Standard Marking |
| Type number | Orderable part number | Chemical content | RoHS | Leadfree conversion date | RHF | IFR (FIT) | MTBF (hours) | MSL | MSL LF |
|---|---|---|---|---|---|---|---|---|---|
| ADC1210S125HN/C1 | ADC1210S125HN/C1,5 | ADC1210S125HN/C1 | Always Pb-free | 3 | 3 | ||||
| ADC1210S125HN/C1 | ADC1210S125HN/C1:5 | ADC1210S125HN/C1 | Always Pb-free | 3 | 3 |
If you have any questions related to this product please contact our support team via e-mail: dataconverter-support@nxp.com. Thank you for your cooperation.
| Type | Format | Title | Date |
|---|---|---|---|
| Data sheet | Single 12-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; CMOS or LVDS DDR digital outputs (v.2.0) | 2010-12-23 | |
| Brochure | Your partner in Mobile Communication Infrastructure design; High Performance RF for wireless infrastructure (v.1.0) | 2011-05-23 | |
| Leaflet | Single-channel ADC with input buffer (v.1.0) | 2010-09-13 | |
| Report | Technical analysis of the JEDEC JESD204A data converter interface (v.2.1) | 2011-10-14 | |
| Report | Power consumption benefits of JESD204 serial interface (v.1.0) | 2010-12-23 | |
| Selection guide | NXP high-speed ADC/DAC selection guide (v.1.0) | 2011-12-14 |
Sample orders normally take 2-4 days for delivery.
If you do not have a direct account with NXP our network of global and regional distributors is available and equipped to support you with NXP samples. As a NXP customer you also have the option to order samples via our sales organisation.
ADC1210S125 demo board; both CMOS and LVDS
ADC1210S125F1 Demo Board
ADC1210S125F2 demoboard
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