Triple Low-Ohmic Single-Pole Double-Throw Analog Switch

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Product Details

Block Diagram

NX3L4053 Block Diagram

NX3L4053 Block Diagram

Features

  • Wide supply voltage range from 1.4 V to 4.3 V
  • Very low ON resistance (peak):
    • 1.8 Ω (typical) at VCC = 1.4 V
    • 1.0 Ω (typical) at VCC = 1.65 V
    • 0.6 Ω (typical) at VCC = 2.3 V
    • 0.6 Ω (typical) at VCC = 2.7 V
    • 0.5 Ω (typical) at VCC = 4.3 V
  • Break-before-make switching
  • High noise immunity
  • ESD protection:
    • HBM JESD22-A114F Class 3A exceeds 4000 V
    • MM JESD22-A115-A exceeds 200 V
    • CDM AEC-Q100-011 revision B exceeds 1000 V
    • IEC61000-4-2 contact discharge exceeds 6000 V for switch ports
  • CMOS low-power consumption
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level A
  • 1.8 V control logic at VCC = 3.6 V
  • Control input accepts voltages above supply voltage
  • Very low supply current, even when input is below VCC
  • High current handling capability (350 mA continuous current under 3.3 V supply)
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

Target Applications

  • Cell phone
  • PDA
  • Portable media player
  • Analog multiplexing and demultiplexing
  • Digital multiplexing and demultiplexing
  • Signal gating

Part numbers include: NX3L4053HR, NX3L4053HR-Q100, NX3L4053PW, NX3L4053PW-Q100.

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Documentation

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5 documents

Design Files

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2 design files

Engineering Services

2 engineering services

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