J-K Type Flip-Flops

By only allowing the output to change on an edge transition, flip-flops provide a robust interface between asynchronous and synchronous systems.

Flip-flops are basic storage elements in digital electronics. They transfer input data to the outputs on an edge transition of their clock input providing a robust interface between asynchronous and synchronous systems. NXP offers a comprehensive range of JK-type flip-flops configured as either positive or negative edge triggered for design flexibility.

Synchronizing asynchronous signals to a specific reference, adding delay to a signal, frequency division, counting of pulses and shifting of data are some common uses of JK-type flip-flops.

JK-type flip-flops are available in standard SO and TSSOP. NXP’s JK-type flip-flops are fully specified from -40 °C to +125 °C.


  • Mixed 5 V and 3.3 V applications
  • Improved signal integrity with integrated termination resistors
  • High noise immunity
  • Flow through pin out for easy layout
  • Wide supply voltage range
  • Low propagation delay
  • Overvoltage tolerant input options
  • Integrated source termination resistor options
  • Bus hold options

Target Applications

  • Frequency division
  • Controlled delays
  • Interface between asynchronous and synchronous systems