Third generation high-performance DisplayPort multiplexer
CBTL06DP213 is an NXP third generation high-performance multi-channel multiplexer, meant for DisplayPort (DP) v1.2, v1.1a or Embedded DisplayPort applications operating at data rate of 1.62 Gbit/s, 2.7 Gbit/s or 5.4 Gbit/s. It is designed using NXP proprietary high-bandwidth pass-gate technology and it can be used for 1 : 2 switching or 2 : 1 multiplexing of four high-speed differential AC-coupled DP channels. Further, it is capable of switching/multiplexing of Hot Plug Detect (HPD) signal as well as Auxiliary (AUX) and Display Data Channel (DDC) signals. In order to support GPUs/CPUs that have dedicated AUX and DDC I/Os, CBTL06DP213 provides an additional level of multiplexing of AUX and DDC signals delivering true flexibility and choice.
A typical application of CBTL06DP213 is on motherboards where one of two GPU DisplayPort sources needs to be selected to connect to a DisplayPort sink device or connector. A controller chip selects which path to use by setting a select signal HIGH or LOW. Due to the bidirectional nature of the signal paths, CBTL06DP213 can also be used in the reverse topology, e.g., to connect one display source device to one of two display sink devices or connectors.
|Package Version||Package Name||Package Description||Reference Codes||Issue Date|
|SOT918-1||TFBGA48||plastic thin fine-pitch ball grid array package; 48 balls; body 5 x 5 x 0.8 mm||MO-195 (JEDEC);||2005-10-13|
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