
PCA9560PW
Dual 5-bit multiplexed 1-bit latched I2C EEPROM DIP switch
The PCA9560 is a 20-pin CMOS device consisting of two 6-bit non-volatile EEPROM registers, 5 hardware pin inputs and a 5-bit multiplexed output with one latched EEPROM bit. It is used for DIP switch-free or jumper-less system configuration and supports Mobile and Desktop VID Configuration, where 3 preset values (2 sets of internal non-volatile registers and 1 set of external hardware pins) set processor voltage for operation in either performance, deep sleep or deeper sleep modes. The PCA9560 is also useful in server and telecom/networking applications when used to replace DIP switches or jumpers, since the settings can be easily changed via I²C/SMBus without having to power down the equipment to open the cabinet. The non-volatile memory retains the most current setting selected before the power is turned off.
The PCA9560 typically resides between the CPU and Voltage Regulator Module (VRM) when used for CPU VID (Voltage IDentification code) configuration. It is used to bypass the CPU-defined VID values and provide a different set of VID values to the VRM, if an increase in the CPU voltage is desired. An increase in CPU voltage combined with an increase in CPU frequency leads to a performance boost of up to 7.5pct. Lower CPU voltage reduces power consumption. The main advantage of the PCA9560 over the older PCA9559 device in this application is that it contains two internal non-volatile EEPROM registers instead of just one, allowing three independent settings (performance operation, deep sleep mode and deeper sleep mode) instead of only two (performance operation and deep sleep mode). The PCA9560 is footprint compatible and a drop-in replacement for the PCA9559, without any software modifications required.
The PCA9560 has 2 address pins allow up to 4 devices to be placed on the same I²C bus or SMBus.
Dual 5-bit multiplexed 1-bit latched I2C EEPROM DIP switch
| Type number | Package | I2C-bus(kHz) | Operating voltage(VDC) | # of Outputs/Latched Outputs/Internal EEPROM Registers | Max Sink Current per bit(mA) | # of Addresses | Max Sink Current, per package(mA) | Operating Temperature(Cel) |
|---|---|---|---|---|---|---|---|---|
| PCA9560PW | SOT360-1 (TSSOP20) | 400 | 3.0~3.6 | 5?1?2 | 25 | 4 | 100 | 0~70 |
| Type number | Orderable part number | Ordering code (12NC) | Product status | Package | Packing | Marking |
|---|---|---|---|---|---|---|
| PCA9560PW | PCA9560PW,112 | 9352 703 30112 | Volume production | SOT360-1 (TSSOP20) | Tube | PCA9560 |
| PCA9560PW | PCA9560PW,118 | 9352 703 30118 | Volume production | SOT360-1 (TSSOP20) | Reel Pack, SMD, 13" | PCA9560 |
| Package Version | Package Name | Package Description | Reference Codes | Issue Date |
|---|---|---|---|---|
| SOT360-1 | TSSOP20 | plastic thin shrink small outline package; 20 leads; body width 4.4 mm | MO-153 (JEDEC); | 2003-02-19 |
| Type number | Orderable part number | Chemical content | RoHS | Leadfree conversion date | RHF | IFR (FIT) | MTBF (hours) | MSL | MSL LF |
|---|---|---|---|---|---|---|---|---|---|
| PCA9560PW | PCA9560PW,112 | PCA9560PW | week 12, 2005 | 2.0 | 5.0E8 | 1 | 1 | ||
| PCA9560PW | PCA9560PW,118 | PCA9560PW | week 12, 2005 | 2.0 | 5.0E8 | 1 | 1 |
| File name | Title | Type | Format | Date |
|---|---|---|---|---|
| PCA9560 | Dual 5-bit multiplexed 1-bit latched I2C EEPROM DIP switch | Data sheet | 2004-05-19 | |
| AN10441 | Level shifting techniques in I2C-bus design | Application note | 2007-06-20 | |
| AN10216 | I2C manual | Application note | 2003-03-27 | |
| AN250 | PCA8550 4-bit multiplexed/1-bit latched 5-bit I2C EEPROM | Application note | 1998-10-01 | |
| 75017144 | I2C Selection Guide 2H 2011 | Leaflet | 2011-09-29 | |
| 39340011 | I2C-bus specification (version 2.1) | Other type | 2000-01-01 | |
| UM10204 | I2C-bus specification and user manual | User manual | 2007-06-26 | |
| UM10206 | I2C Demonstration Board 2005-1 Quick Start Guide | User manual | 2006-06-13 | |
| UM10204_JA | I2C-bus specification and user manual | User manual | 2013-04-03 |
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