3.3 V or 5.0 V Universal Asynchronous Receiver/Transmitter (UART)

  • Archived
  • This page contains information on a product that is no longer manufactured (discontinued). Specifications and information herein are available for historical reference only.

Product Details

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Block Diagram

SC28L91 Block Diagram

SC28L91 Block Diagram

Features

  • Member of IMPACT family: 3.3 to 5.0 volt , -40 Cel to +85 Cel and 68K for 80xxx bus interface for all devices.
  • A full-duplex independent asynchronous receiver/transmitter
  • 16 character FIFOs for each receiver and transmitter
  • Pin programming selects 68K or 80xxx-bus interface
  • Programmable data format
    • 5 to 8 data bits plus parity
    • Odd, even, no parity or force parity
    • - 1, 1.5 or 2 stop bits programmable in 1/16-bit increments
  • 16-bit programmable Counter/Timer
  • Programmable baud rate for each receiver and transmitter selectable from:
    • 28 fixed rates: 50 to 230.4 k baud
    • Other baud rates to 1 MHz at 16X
    • Programmable user-defined rates derived from a programmable counter/timer
    • External 1X or 16X clock
  • Parity, framing, and overrun error detection
  • False start bit detection
  • Line break detection and generation
  • Programmable channel mode
    • Normal (full-duplex)
    • Automatic echo
    • Local loop back
    • Remote loop back
    • Multi-drop mode (also called 'wake-up' or '9-bit')
  • Multi-function 7-bit input port (includes IACKN)
    • Can serve as clock or control inputs
    • Change of state detection on four inputs
    • Inputs have typically >100 kΩ pull-up resistors
    • Change of state detectors for modem control
  • Multi-function 8-bit output port
    • Individual bit set/reset capability
    • Outputs can be programmed to be status/interrupt signals
    • FIFO status for DMA interface
  • Versatile interrupt system
    • Single interrupt output with eight maskable interrupting conditions
    • Output port can be configured to provide a total of up to six separate interrupt outputs that may be wire ORed.
    • Each FIFO can be programmed for four different interrupt levels
    • Watchdog timer for the receiver
  • Maximum data transfer rates:
  • 1X - 1 Mbit/s, 16X - 1 Mbit/s
  • Automatic wake-up mode for multi-drop applications
  • Start-end break interrupt/status with mid-character break detect.
  • On-chip crystal oscillator
  • Power-down mode
  • Receiver time-out mode
  • Single +3.3 V or +5 V power supply

Part numbers include: SC28L91A1B.

Documentation

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Design Files

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