Quad 2-input multiplexer; 3-state
The 74HC257; 74HCT257 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL).
The 74HC257 and 74HCT257 have four identical 2-input multiplexers with 3-state outputs, which select 4 bits of data from two sources and are controlled by a common data select input (S).
The data inputs from source 0 (1I0 to 4I0) are selected when input S is LOW and the data inputs from source 1 (1I1 to 4I1) are selected when S is HIGH. Data appears at the outputs (1Y to 4Y) in true (non-inverting) form from the selected inputs.
The 74HC257 and 74HCT257 are the logic implementation of a 4-pole, 2-position switch, where the position of the switch is determined by the logic levels applied to S. The outputs are forced to a high-impedance OFF-state when OE is HIGH.
The logic equations for the outputs are:
1Y = OE • (1I1 • S • 1I0 • S)
2Y = OE • (2I1 • S • 2I0 • S)
3Y = OE • (3I1 • S • 3I0 • S)
4Y = OE • (4I1 • S • 4I0 • S)
Except for their non-inverting (true) outputs the 74HC257; 74HCT257 are identical to the 74HC258.
|Type number||Package||Nr of pins||Package name||Product status||tpd(ns)||VCC(V)||Family||Power dissipation considerations||Logic switching levels||Output drive capability(mA)||Description||Tamb(Cel)|
|16||SSOP16||Production||11||2.0 - 6.0||HC(T)||low||CMOS||+/- 7.8||quad 2-input multiplexer (3-State)||-40~125|
|Package Version||Package Name||Package Description||Reference Codes||Issue Date|
|SOT338-1||SSOP16||plastic shrink small outline package; 16 leads; body width 5.3 mm||MO-150 (JEDEC);||2003-02-19|
|Type number||Ordering code (12NC)||Orderable part number||Region||Distributor||In stock||Order quantity||Inventory date||Buy online||Samples|
|74HC257DB||9351 886 60112||74HC257DB,112||not available|
|74HC257DB||9351 886 60118||74HC257DB,118||not available|
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