
74LVC257AD
Quad 2-input multiplexer with 5 V tolerant inputs/outputs; 3-state
The 74LVC257A is a quad 2-input multiplexer with 3-state outputs, which select 4 bits of data from two sources and are controlled by a common data select input (pin S). The data inputs from source 0 (pins 1I0 to 4I0) are selected when pin S is LOW and the data inputs from source 1 (pins 1I1 to 4I1) are selected when pin S is HIGH. Data appears at the outputs (pins 1Y to 4Y) in true (non-inverting) form from the selected inputs. The device is the logic implementation of a 4-pole, 2-position switch, where the position of the switch is determined by the logic levels applied to pin S. The outputs are forced to a high-impedance OFF-state when pin OE is HIGH.
Inputs can be driven from either 3.3 V or 5.0 V devices. When disabled, up to 5.5 V can be applied to the outputs. These features allow the use of these devices as translators in mixed 3.3 V and 5 V applications.
Low-Voltage CMOS (LVC)
Quad 2-input multiplexer with 5 V tolerant inputs/outputs; 3-state
| Type number | Package | Nr of pins | Package name | Product status | tpd(ns) | VCC(V) | Family | Power dissipation considerations | Logic switching levels | Output drive capability(mA) | Description | Tamb(Cel) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74LVC257AD | SOT109-1 (SO16) | 16 | SO16 | Production | 2.4 | 1.2 - 3.6 | LVC | low | CMOS/LVTTL | +/- 24 | quad 2-input multiplexer (3-State) | -40~125 |
| Type number | Orderable part number | Ordering code (12NC) | Product status | Package | Packing | Marking |
|---|---|---|---|---|---|---|
| 74LVC257AD | 74LVC257AD,112 | 9352 606 78112 | Volume production | SOT109-1 (SO16) | Tube | 74LVC257AD |
| 74LVC257AD | 74LVC257AD,118 | 9352 606 78118 | Volume production | SOT109-1 (SO16) | Reel Pack, SMD, 13" | 74LVC257AD |
| Package Version | Package Name | Package Description | Reference Codes | Issue Date |
|---|---|---|---|---|
| SOT109-1 | SO16 | plastic small outline package; 16 leads; body width 3.9 mm | MS-012 (JEDEC); 076E07 (IEC); | 2003-02-19 |
| Type number | Orderable part number | Chemical content | RoHS | Leadfree conversion date | RHF | IFR (FIT) | MTBF (hours) | MSL | MSL LF |
|---|---|---|---|---|---|---|---|---|---|
| 74LVC257AD | 74LVC257AD,112 | 74LVC257AD | week 35, 2004 | 3.87 | 2.5839793281653747E8 | 1 | 1 | ||
| 74LVC257AD | 74LVC257AD,118 | 74LVC257AD | week 35, 2004 | 3.87 | 2.5839793281653747E8 | 1 | 1 |
| File name | Title | Type | Format | Date |
|---|---|---|---|---|
| 74LVC257A | Quad 2-input multiplexer with 5 V tolerant inputs/outputs; 3-state | Data sheet | 2011-11-28 | |
| AN240 | Interfacing 3 Volt and 5 Volt Applications | Application note | 1995-09-15 | |
| AN263 | Power considerations when using CMOS and BiCMOS logic devices | Application note | 2002-02-05 | |
| AN11009 | Pin FMEA for LVC family | Application note | 2011-02-04 | |
| AN212 | Package lead inductance considerations in high-speed applications | Application note | 2013-03-13 | |
| AN10156 | Sorting through the low voltage logic maze | Application note | 2013-03-13 | |
| lvc257a | lvc257a IBIS model | IBIS model | ibs | 2013-04-07 |
| lvc | lvc Spice model | SPICE model | zip | 2013-05-07 |
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