Quad 2-input multiplexer with 5 V tolerant inputs/outputs; 3-state
The 74LVC257A is a quad 2-input multiplexer with 3-state outputs, which select 4 bits of data from two sources and are controlled by a common data select input (pin S). The data inputs from source 0 (pins 1I0 to 4I0) are selected when pin S is LOW and the data inputs from source 1 (pins 1I1 to 4I1) are selected when pin S is HIGH. Data appears at the outputs (pins 1Y to 4Y) in true (non-inverting) form from the selected inputs. The device is the logic implementation of a 4-pole, 2-position switch, where the position of the switch is determined by the logic levels applied to pin S. The outputs are forced to a high-impedance OFF-state when pin OE is HIGH.
Inputs can be driven from either 3.3 V or 5.0 V devices. When disabled, up to 5.5 V can be applied to the outputs. These features allow the use of these devices as translators in mixed 3.3 V and 5 V applications.
|Type number||Package||Nr of pins||Package name||Product status||tpd(ns)||VCC(V)||Family||Power dissipation considerations||Logic switching levels||Output drive capability(mA)||Description||Tamb(Cel)|
|16||SO16||Production||2.4||1.2 - 3.6||LVC||low||CMOS/LVTTL||+/- 24||quad 2-input multiplexer (3-State)||-40~125|
|Package Version||Package Name||Package Description||Reference Codes||Issue Date|
|SOT109-1||SO16||plastic small outline package; 16 leads; body width 3.9 mm||MS-012 (JEDEC); 076E07 (IEC);||2003-02-19|
|Type number||Ordering code (12NC)||Orderable part number||Region||Distributor||In stock||Order quantity||Inventory date||Buy online||Samples|
|74LVC257AD||9352 606 78112||74LVC257AD,112||not available|
|74LVC257AD||9352 606 78118||74LVC257AD,118||NA||AVNET EXPRESS AMERICAS||10,200||5/16/2013|
|EU||AVNET EXPRESS EUROPE||5,000||5/16/2013|
|ASIA||ARROW ASIA PAC LTD||2,500||1/31/2013|
|JAPAN||CHIP ONE STOP||100||05/16/2013|
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